  .   8  )   (            *  )                                                          MangOH Green with WP8548 Module       2   !swir,mangoh-green-wp8548 swir,wp8548 qcom,mdm9615            ,      cpus                                 cpu@0            !arm,cortex-a5            =cpu          I            cpu-pmu          !arm,cortex-a5-pmu            Z      
        clocks     cxo_board            !fixed-clock          e             r$          vsdcc-regulator          !regulator-fixed          SDCC Power            )2          )2                            soc                                             !simple-bus     cache-controller@2040000             !arm,pl310-cache                                                                         interrupt-controller@2000000             !qcom,msm-qgic2                   (                                          timer@200a000            !qcom,kpss-timer qcom,msm-timer        $   Z                                               r           9         pinctrl@800000           !qcom,mdm9615-pinctrl             D        T              X        `            Z                           (                 @         l           vdefault                gsbi3_pins                 mux         gpio8 gpio9 gpio10 gpio11           gsbi3                                gsbi4_pins                 mux         gpio12 gpio13 gpio14 gpio15         gsbi4                                gsbi5_i2c_pins              	   pin16           gpio16        
  gsbi5_i2c                             pin17           gpio17        
  gsbi5_i2c                                gsbi5_uart_pins                mux         gpio18 gpio19           gsbi5_uart                               reset_out_pins                 pins            gpio66          gpio                                          gpioext1_pins                  pins            gpio2           gpio                               sdc_cd_pins                pins            gpio42          gpio                                    clock-controller@900000          !qcom,gcc-mdm9615             e                                       @                   clock-controller@28000000            !qcom,lcc-mdm9615             (               e                    clock-controller@2011000             !qcom,kpss-gcc syscon                                   rng@1a500000          
   !qcom,prng            P                          core                         H       gsbi@16100000            !qcom,gsbi-v1.0.0            -                                       iface         	  8disabled                                          i2c@16180000             !qcom,i2c-qup-v1.1.1                                                  Z                                      core iface        	  8disabled             gsbi@16200000            !qcom,gsbi-v1.0.0            -                                        iface           8okay                                               ?      spi@16280000             !qcom,spi-qup-v1.1.1                                    (              Z                  In6                             core iface          8okay            l           vdefault                       n6    spi@0            !swir,mangoh-iotport-spi         In6                          gsbi@16300000            !qcom,gsbi-v1.0.0            -            0                           iface           8okay                                               [           ?      serial@16340000       %   !qcom,msm-uartdm-v1.3 qcom,msm-uartdm             4     0              Z                                      core iface          8okay            l           vdefault          gsbi@16400000            !qcom,gsbi-v1.0.0            -            @                           iface           8okay                                               [           ?      i2c@16480000             !qcom,i2c-qup-v1.1.1                                    H              Z                                n6                             core iface          8okay             r @        l   	        vdefault    mux@71           !nxp,pca9548                                       q   i2c@0                                                i2c@1                                               i2c@2                                               i2c@3                                            hub@8            !smsc,usb3503a                       g   
               u   
                            i2c@4                                            gpio@3e         `           (            !semtech,sx1509q             >         ,            Z                         D                  i2c@5                                            gpio@3f         l           vdefault         `           (            !semtech,sx1509q             ?         ,            Z                         D                              i2c@6                                            gpio@70         `           (            !semtech,sx1509q             p         ,            Z                        D                     
         i2c@7                                                     serial@16440000       %   !qcom,msm-uartdm-v1.3 qcom,msm-uartdm             D     @              Z                                      core iface          8okay            l           vdefault          qcom,ssbi@500000          
   !qcom,ssbi             P             pmic-arbiter       pmic@0           !qcom,pm8018 qcom,pm8921          Z                 (                                                     pwrkey@1c         &   !qcom,pm8018-pwrkey qcom,pm8921-pwrkey                        ,            Z   2      3             =	               mpps@50          !qcom,pm8018-mpp qcom,ssbi-mpp                    (               P         D        `           T                                rtc@11d           !qcom,pm8018-rtc qcom,pm8921-rtc          ,            Z   '                             gpio@150              !qcom,pm8018-gpio qcom,ssbi-gpio            P                 (            D        T                      `                  usb-vbus-5v-state           gpio4           normal                                                         dma-controller@12182000          !qcom,bam-v1.3.0                        Z       b                 n        bam_clk                                          dma-controller@12142000          !qcom,bam-v1.3.0                        Z       a                 o        bam_clk                                          amba             !simple-bus                                        mmc@12180000            8okay             !arm,pl18x arm,primecell                                  Z       h           cmd_irq               x      n        mclk apb_pclk           !           Ml          +         <        N           Z                    _tx rx                 x                 l           vdefault          i        t      *         mmc@12140000             !arm,pl18x arm,primecell                	  8disabled                            Z       g           cmd_irq               y      o        mclk apb_pclk           !            +         <        Ml          }        N           Z                    _tx rx                 y                  syscon@1a400000          !qcom,tcsr-mdm9615 syscon             @                       rpm@108000           !qcom,rpm-mdm9615                                         $   Z                                      ack err wakeup     regulators           !qcom,rpm-pm8018-regulators                                                 s1                       0         j                s2            (                    j                s3                      w@          w@         j                            s4                        !         j                            s5                      p          p         j                            l2                      w@          w@               l3                      w@          w@               l4            2Z          2Z               l5            +|          +|               l6            w@          +|               l7            :                         l8            O          O               l9            q          0               l10                                    l11                                    l12                                    l13           :          -p               l14           +|          +|               lvs1                            memory@48000000          =memory           H           aliases          /soc/gsbi@16200000/spi@16280000       #  /soc/gsbi@16300000/serial@16340000        #  /soc/gsbi@16400000/serial@16440000           /soc/gsbi@16400000/i2c@16480000         /soc/amba/mmc@12180000        chosen          serial1:115200n8             	#address-cells #size-cells model compatible interrupt-parent device_type next-level-cache interrupts #clock-cells clock-frequency regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on phandle ranges reg arm,data-latency cache-unified cache-level interrupt-controller #interrupt-cells cpu-offset gpio-controller gpio-ranges #gpio-cells pinctrl-0 pinctrl-names pins function drive-strength bias-disable bias-pull-up output-high input-enable #power-domain-cells #reset-cells clocks clock-names assigned-clocks assigned-clock-rates cell-index status qcom,mode spi-max-frequency syscon-tcsr connect-gpios intn-gpios initial-mode probe-reset qcom,controller-type debounce allow-set-time qcom,drive-strength power-source #dma-cells qcom,ee arm,primecell-periphid interrupt-names bus-width cap-sd-highspeed cap-mmc-highspeed vmmc-supply dmas dma-names disable-wp cd-gpios no-1-8-v qcom,ipc vin_lvs1-supply vdd_l7-supply vdd_l8-supply vdd_l9_l10_l11_l12-supply qcom,switch-mode-frequency bias-pull-down spi0 serial0 serial1 i2c0 mmc0 stdout-path 