  4   8  0   (              0                                                      1   Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C3          '   !qcom,ipq4019-ap-dk04.1-c3 qcom,ipq4019           ,      reserved-memory                                    =   smem@87e00000            D               H      tz@87e80000          D               H         aliases          O/soc/spi@78b5000             T/soc/spi@78b6000             Y/soc/i2c@78b7000             ^/soc/i2c@78b8000             c/soc/serial@78af000          k/soc/serial@78b0000       cpus                                 cpu@0            scpu          !arm,cortex-a7            qcom,kpss-acc-v2                                                 D                   	                                          cpu@1            scpu          !arm,cortex-a7            qcom,kpss-acc-v2                                                 D                  	                                          cpu@2            scpu          !arm,cortex-a7            qcom,kpss-acc-v2                            	            
         D                  	                                          cpu@3            scpu          !arm,cortex-a7            qcom,kpss-acc-v2                                                 D                  	                                          l2-cache             !cache                                                opp_table0           !operating-points-v2                          opp-48000000                l                 opp-200000000                                opp-500000000               e                 opp-716000000               *K                    memory           smemory           D            pmu          !arm,cortex-a7-pmu                          clocks     sleep_clk            !fixed-clock            }         +gcc_sleep_clk_src           >                      xo           !fixed-clock          l         >                         firmware       scm          !qcom,scm-ipq4019 qcom,scm            timer            !arm,armv7-timer       0                                            l          K      soc                                    =         !simple-bus     interrupt-controller@b000000             !qcom,msm-qgic2           U        j            D                              clock-controller@1800000             !qcom,gcc-ipq4019            >           {                       D                       rng@22000         
   !qcom,prng            D     @               +        core          	  disabled          pinctrl@1000000          !qcom,ipq4019-pinctrl             D    0                                 d                    U        j                                     serial0-pinmux          gpio16 gpio17           blsp_uart0                             serial1-pinmux          gpio8 gpio9 gpio10 gpio11           blsp_uart1                             spi-0-pinmux                   pinmux        
  blsp_spi0           gpio13 gpio14 gpio15                   pinmux_cs           gpio            gpio12                             i2c-0-pinmux            gpio20 gpio21         
  blsp_i2c0                  nand-pins         i  gpio53 gpio55 gpio56 gpio57 gpio58 gpio59 gpio60 gpio62 gpio63 gpio64 gpio65 gpio66 gpio67 gpio68 gpio69            qpic                         regulator@1948000            !qcom,vqmmc-ipq4019-regulator             D            vqmmc            `        % -         =      	  disabled          mmc@7824900          !qcom,sdhci-msm-v4            DI   @            Qhc core                 {                     [hc_irq pwr_irq          k                  .      /           iface core xo         	  disabled          dma-controller@7884000           !qcom,bam-v1.7.0          D@  0                                           bam_clk         u                       okay                      spi@78b5000          !qcom,spi-qup-v2.2.1          DP                    _                                core iface                                                        tx rx           okay                       default                      flash@0                                   D              !micron,n25q128a11 jedec,spi-nor         n6          spi@78b6000          !qcom,spi-qup-v2.2.1          D`                    `                                core iface                                                        tx rx         	  disabled          i2c@78b7000          !qcom,i2c-qup-v2.2.1          Dp                    a                                core iface                                                	        tx rx         	  disabled          i2c@78b8000          !qcom,i2c-qup-v2.2.1          D                    b                                core iface                                          
              tx rx         	  disabled          dma-controller@8e04000           !qcom,bam-v1.7.0          D@                                      !        bam_clk         u                             	  disabled                      crypto@8e3a000           !qcom,crypto-v5.1             D   `                !      "      #        iface bus core                              rx tx         	  disabled          clock-controller@b088000             !qcom,kpss-acc-v2             D                           clock-controller@b098000             !qcom,kpss-acc-v2             D	                           clock-controller@b0a8000             !qcom,kpss-acc-v2             D
                     	      clock-controller@b0b8000             !qcom,kpss-acc-v2             D                           regulator@b089000         
   !qcom,saw2            D                                    regulator@b099000         
   !qcom,saw2            D	                                    regulator@b0a9000         
   !qcom,saw2            D
                              
      regulator@b0b9000         
   !qcom,saw2            D                                    regulator@b012000         
   !qcom,saw2            D                                serial@78af000        %   !qcom,msm-uartdm-v1.4 qcom,msm-uartdm             D                    k           okay                                 core iface                               tx rx                      default       serial@78b0000        %   !qcom,msm-uartdm-v1.4 qcom,msm-uartdm             D                     l           okay                                 core iface                              tx rx                      default       watchdog@b017000          $   !qcom,kpss-wdt qcom,kpss-wdt-ipq4019          Dp    @                       
      	  disabled          restart@4ab000           !qcom,pshold          D J          pci@40000000             !qcom,pcie-ipq4019             D@     @            @             Qdbi elbi parf config             spci                     
                                                 0   =           @                 @0  @0                                    [msi         j                                  1                                                                                                                               '      (      )        aux master_bus slave_bus          `  ?                                                                              X  Faxi_m axi_s pipe axi_m_vmid axi_s_xpu parf phy axi_m_sticky pipe_sticky pwr ahb phy_ahb         okay            R      &         dma-controller@7984000           !qcom,bam-v1.7.0          D@                   e                  -        bam_clk         u                     	  disabled                      nand-controller@79b0000          !qcom,ipq4019-nand            D                                              -      ,      	  core aon                                     
  tx rx cmd         	  disabled                       default    nand@0           D            ^           p                       wifi@a000000             !qcom,ipq4019-wifi            D
             0  ?                                           \  Fwifi_cpu_init wifi_radio_srif wifi_radio_warm wifi_radio_cold wifi_core_warm wifi_core_cold                ;      <      =      *  wifi_wcss_cmd wifi_wcss_ref wifi_wcss_rtc                              !          "          #          $          %          &          '          (          )          *          +          ,          -          .          /                   ]  [msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 msi8 msi9 msi10 msi11 msi12 msi13 msi14 msi15 legacy          	  disabled          wifi@a800000             !qcom,ipq4019-wifi            D
            0  ?                        	      
            \  Fwifi_cpu_init wifi_radio_srif wifi_radio_warm wifi_radio_cold wifi_core_warm wifi_core_cold                >      ?      @      *  wifi_wcss_cmd wifi_wcss_ref wifi_wcss_rtc                   0          1          2          3          4          5          6          7          8          9          :          ;          <          =          >          ?                   ]  [msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 msi8 msi9 msi10 msi11 msi12 msi13 msi14 msi15 legacy          	  disabled          mdio@90000                                     !qcom,ipq4019-mdio            D 	     d      	  disabled       ethernet-phy@0           D          ethernet-phy@1           D         ethernet-phy@2           D         ethernet-phy@3           D         ethernet-phy@4           D            ssphy@9a000          !qcom,usb-ss-ipq4019-phy                      D 	          	  Qphy_base            ?              Fpor_rst       	  disabled                      hsphy@a6000          !qcom,usb-hs-ipq4019-phy                      D 
`    @      	  Qphy_base            ?                    Fpor_rst srif_rst          	  disabled                      usb3@8af8800             !qcom,ipq4019-dwc3 qcom,dwc3          D                                            8      9      :        core sleep mock_utmi              =      	  disabled       dwc3@8a00000          
   !snps,dwc3            D                                             usb2-phy usb3-phy           host             hsphy@a8000          !qcom,usb-hs-ipq4019-phy                      D 
    @      	  Qphy_base            ?                    Fpor_rst srif_rst          	  disabled                      usb2@60f8800             !qcom,ipq4019-dwc3 qcom,dwc3          D                                            5      6      7        master sleep mock_utmi            =      	  disabled       dwc3@6000000          
   !snps,dwc3            D                                         	  usb2-phy            host                chosen          serial0:115200n8             	#address-cells #size-cells model compatible interrupt-parent ranges reg no-map spi0 spi1 i2c0 i2c1 serial0 serial1 device_type enable-method next-level-cache qcom,acc qcom,saw clocks clock-frequency clock-latency operating-points-v2 cache-level phandle opp-shared opp-hz clock-latency-ns interrupts clock-output-names #clock-cells always-on interrupt-controller #interrupt-cells #power-domain-cells #reset-cells clock-names status gpio-controller gpio-ranges #gpio-cells pins function bias-disable output-high regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on reg-names interrupt-names bus-width #dma-cells qcom,ee dmas dma-names pinctrl-0 pinctrl-names cs-gpios spi-max-frequency qcom,controlled-remotely regulator timeout-sec linux,pci-domain bus-range num-lanes interrupt-map-mask interrupt-map resets reset-names perst-gpios nand-ecc-strength nand-ecc-step-size nand-bus-width #phy-cells phys phy-names dr_mode stdout-path 