Ðþí  3   8  /L   (            »  /                                                      1   Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1          '   !qcom,ipq4019-ap-dk01.1-c1 qcom,ipq4019           ,      reserved-memory                                    =   smem@87e00000            D‡à               H      tz@87e80000          D‡è               H         aliases          O/soc/spi@78b5000             T/soc/spi@78b6000             Y/soc/i2c@78b7000             ^/soc/i2c@78b8000             c/soc/serial@78af000       cpus                                 cpu@0            kcpu          !arm,cortex-a7            wqcom,kpss-acc-v2             …            –            Ÿ            D             ¨      	         ¯             ¿ è          Í         cpu@1            kcpu          !arm,cortex-a7            wqcom,kpss-acc-v2             …            –            Ÿ            D            ¨      	         ¯             ¿ è          Í         cpu@2            kcpu          !arm,cortex-a7            wqcom,kpss-acc-v2             …            –   	         Ÿ   
         D            ¨      	         ¯             ¿ è          Í         cpu@3            kcpu          !arm,cortex-a7            wqcom,kpss-acc-v2             …            –            Ÿ            D            ¨      	         ¯             ¿ è          Í         l2-cache             !cache            á            Ÿ            í            opp_table0           !operating-points-v2           õ         í      opp-48000000                 Ül          è       opp-200000000                ëÂ          è       opp-500000000                Íe          è       opp-716000000                *­K          è          memory           kmemory           D              pmu          !arm,cortex-a7-pmu                         clocks     sleep_clk            !fixed-clock          ¯  }         #gcc_sleep_clk_src           6             í         xo           !fixed-clock          ¯Ül         6             firmware       scm          !qcom,scm-ipq4019 qcom,scm            timer            !arm,armv7-timer       0                                           ¯Ül          C      soc                                    =         !simple-bus     interrupt-controller@b000000             !qcom,msm-qgic2           M        b            D                     í         clock-controller@1800000             !qcom,gcc-ipq4019            6           s           ‡            D€              í         rng@22000         
   !qcom,prng            D     @         ¨      +        ”core             okay          pinctrl@1000000          !qcom,ipq4019-pinctrl             D    0           §        ·              d        Ã            M        b                  Ð            í      serial_pinmux            í      mux         Ïgpio60 gpio61           Ôblsp_uart0           Ý         spi_0_pinmux             í      pinmux        
  Ôblsp_spi0           Ïgpio55 gpio56 gpio57          pinmux_cs           Ôgpio            Ïgpio54        pinconf         Ïgpio55 gpio56 gpio57            ê            Ý      pinconf_cs          Ïgpio54          ê            Ý         ù            regulator@1948000            !qcom,vqmmc-ipq4019-regulator             D”€            vqmmc            ã`        , -ÆÀ         D      	   disabled          mmc@7824900          !qcom,sdhci-msm-v4            D‚I   ‚@            Xhc core                {          Š           bhc_irq pwr_irq          r            ¨      .      /              ”iface core xo         	   disabled          dma-controller@7884000           !qcom,bam-v1.7.0          Dˆ@  0                î            ¨              ”bam_clk         |           ‡             okay             í         spi@78b5000          !qcom,spi-qup-v2.2.1          D‹P                   _            ¨                    ”core iface                                                        ”tx rx            okay            ž           ¨default         ¶      6       mx25l25635e@0                                     D             !mx25l25635e         ¿n6          spi@78b6000          !qcom,spi-qup-v2.2.1          D‹`                   `            ¨                    ”core iface                                                        ”tx rx         	   disabled          i2c@78b7000          !qcom,i2c-qup-v2.2.1          D‹p                   a            ¨                    ”core iface                                                	        ”tx rx         	   disabled          i2c@78b8000          !qcom,i2c-qup-v2.2.1          D‹€                   b            ¨                    ”core iface                                          
              ”tx rx         	   disabled          dma-controller@8e04000           !qcom,bam-v1.7.0          Dà@                   Ï            ¨      !        ”bam_clk         |           ‡            Ñ         okay             í         crypto@8e3a000           !qcom,crypto-v5.1             Dã    `          ¨      !      "      #        ”iface bus core                              ”rx tx            okay          clock-controller@b088000             !qcom,kpss-acc-v2             D€     €             í         clock-controller@b098000             !qcom,kpss-acc-v2             D	€     €             í         clock-controller@b0a8000             !qcom,kpss-acc-v2             D
€     €             í   	      clock-controller@b0b8000             !qcom,kpss-acc-v2             D€     €             í         regulator@b089000         
   !qcom,saw2            D                  ê         í         regulator@b099000         
   !qcom,saw2            D	                  ê         í         regulator@b0a9000         
   !qcom,saw2            D
                  ê         í   
      regulator@b0b9000         
   !qcom,saw2            D                  ê         í         regulator@b012000         
   !qcom,saw2            D              ê         í         serial@78af000        %   !qcom,msm-uartdm-v1.4 qcom,msm-uartdm             DŠð                   k            okay             ¨                    ”core iface                               ”tx rx           ž           ¨default       serial@78b0000        %   !qcom,msm-uartdm-v1.4 qcom,msm-uartdm             D‹                    l         	   disabled             ¨                    ”core iface                              ”tx rx         watchdog@b017000          $   !qcom,kpss-wdt qcom,kpss-wdt-ipq4019          Dp    @         ¨           ô   
         okay          restart@4ab000           !qcom,pshold          D J°          pci@40000000             !qcom,pcie-ipq4019             D@     @     ¨       @             Xdbi elbi parf config             kpci                             ÿ                                          0   =           @          ‚       @0  @0       Ð                            bmsi         b           %                     €  8                         Ž                                                                                    ‘            ¨      '      (      )        ”aux master_bus slave_bus          `  F                                                                              X  Maxi_m axi_s pipe axi_m_vmid axi_s_xpu parf phy axi_m_sticky pipe_sticky pwr ahb phy_ahb       	   disabled          dma-controller@7984000           !qcom,bam-v1.7.0          D˜@                   e            ¨      -        ”bam_clk         |           ‡          	   disabled             í         nand-controller@79b0000          !qcom,ipq4019-nand            D›                                        ¨      -      ,      	  ”core aon                                     
  ”tx rx cmd         	   disabled       nand@0           D            Y           k           ~            wifi@a000000             !qcom,ipq4019-wifi            D
             0  F                                           \  Mwifi_cpu_init wifi_radio_srif wifi_radio_warm wifi_radio_cold wifi_core_warm wifi_core_cold          ¨      ;      <      =      *  ”wifi_wcss_cmd wifi_wcss_ref wifi_wcss_rtc         Ì                    !          "          #          $          %          &          '          (          )          *          +          ,          -          .          /          ¨         ]  bmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 msi8 msi9 msi10 msi11 msi12 msi13 msi14 msi15 legacy             okay          wifi@a800000             !qcom,ipq4019-wifi            D
€            0  F                        	      
            \  Mwifi_cpu_init wifi_radio_srif wifi_radio_warm wifi_radio_cold wifi_core_warm wifi_core_cold          ¨      >      ?      @      *  ”wifi_wcss_cmd wifi_wcss_ref wifi_wcss_rtc         Ì         0          1          2          3          4          5          6          7          8          9          :          ;          <          =          >          ?          ©         ]  bmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 msi8 msi9 msi10 msi11 msi12 msi13 msi14 msi15 legacy             okay          mdio@90000                                     !qcom,ipq4019-mdio            D 	     d      	   disabled       ethernet-phy@0           D          ethernet-phy@1           D         ethernet-phy@2           D         ethernet-phy@3           D         ethernet-phy@4           D            ssphy@9a000          !qcom,usb-ss-ipq4019-phy                      D 	           	  Xphy_base            F              Mpor_rst       	   disabled             í         hsphy@a6000          !qcom,usb-hs-ipq4019-phy                      D 
`    @      	  Xphy_base            F                    Mpor_rst srif_rst          	   disabled             í         usb3@8af8800             !qcom,ipq4019-dwc3 qcom,dwc3          D¯ˆ                                      ¨      8      9      :        ”core sleep mock_utmi              =      	   disabled       dwc3@8a00000          
   !snps,dwc3            D    €                „           ˜              usb2-phy usb3-phy           §host             hsphy@a8000          !qcom,usb-hs-ipq4019-phy                      D 
€    @      	  Xphy_base            F                    Mpor_rst srif_rst          	   disabled             í         usb2@60f8800             !qcom,ipq4019-dwc3 qcom,dwc3          Dˆ                                      ¨      5      6      7        ”master sleep mock_utmi            =      	   disabled       dwc3@6000000          
   !snps,dwc3            D    €                ˆ           ˜         	  usb2-phy            §host                chosen          ¯serial0:115200n8             	#address-cells #size-cells model compatible interrupt-parent ranges reg no-map spi0 spi1 i2c0 i2c1 serial0 device_type enable-method next-level-cache qcom,acc qcom,saw clocks clock-frequency clock-latency operating-points-v2 cache-level phandle opp-shared opp-hz clock-latency-ns interrupts clock-output-names #clock-cells always-on interrupt-controller #interrupt-cells #power-domain-cells #reset-cells clock-names status gpio-controller gpio-ranges #gpio-cells pins function bias-disable drive-strength output-high regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on reg-names interrupt-names bus-width #dma-cells qcom,ee dmas dma-names pinctrl-0 pinctrl-names cs-gpios spi-max-frequency qcom,controlled-remotely regulator timeout-sec linux,pci-domain bus-range num-lanes interrupt-map-mask interrupt-map resets reset-names nand-ecc-strength nand-ecc-step-size nand-bus-width #phy-cells phys phy-names dr_mode stdout-path 