Ð þíþ8((Öð<Amazon's Annapurna Labs Alpine v3 Evaluation Platform (EVP),amazon,al-alpine-v3-evpamazon,al-alpine-v3"1cpus"1cpu@0=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@1=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@2=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@3=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@100=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@101=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@102=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@103=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@200=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@201=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@202=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@203=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@300=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@301=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@302=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cpu@303=cpuarm,cortex-a72IMpsci[€h@z‡À”@¦³cache@0cache] j@|ÄÐcache@100cache] j@|ÄÐcache@200cache] j@|ÄÐcache@300cache] j@|ÄÐreserved-memory"1Øsecmon@0Ißpsci arm,psci-0.2Tsmctimerarm,armv8-timer0æ   pmuarm,cortex-a72-pmu æsoc simple-bus"1Øinterrupt-controller@f0000000 arm,gic-v3ñPIð€ð  ð ðð  æ Ðpcie@fbd00000pci-host-ecam-generic=pci1"ñIûÐø*@9H:P;X<`=h>p?x@Øþþ8Bmsix@fbe00000al,alpine-msixIûàM\Pl¿Ðio-fabric simple-bus"1Øüserial@1883000 ns16550aIˆ0 æ|Œ–£okayserial@1884000 ns16550aIˆ@ æ|Œ– £disabledserial@1885000 ns16550aIˆP æ|Œ– £disabledserial@1886000 ns16550aIˆ` æ|Œ– £disabledaliasesª/soc/io-fabric/serial@1883000²/soc/io-fabric/serial@1884000º/soc/io-fabric/serial@1885000Â/soc/io-fabric/serial@1886000chosenÊserial0:115200n8 modelcompatibleinterrupt-parent#address-cells#size-cellsdevice_typeregenable-methodd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecache-levelphandlerangesno-mapinterrupts#interrupt-cellsinterrupt-controllerinterrupt-map-maskinterrupt-mapbus-rangemsi-parentmsi-controlleral,msi-base-spial,msi-num-spisclock-frequencyreg-shiftreg-io-widthstatusserial0serial1serial2serial3stdout-path