}=8o<(o ,A8FSony Xperia XZ2 CompactLsony,apollo-rowqcom,sdm845aliases!W/soc@0/geniqup@8c0000/i2c@880000!\/soc@0/geniqup@8c0000/i2c@884000!a/soc@0/geniqup@8c0000/i2c@888000!f/soc@0/geniqup@8c0000/i2c@88c000!k/soc@0/geniqup@8c0000/i2c@890000!p/soc@0/geniqup@8c0000/i2c@894000!u/soc@0/geniqup@8c0000/i2c@898000!z/soc@0/geniqup@8c0000/i2c@89c000!/soc@0/geniqup@ac0000/i2c@a80000!/soc@0/geniqup@ac0000/i2c@a84000!/soc@0/geniqup@ac0000/i2c@a88000!/soc@0/geniqup@ac0000/i2c@a8c000!/soc@0/geniqup@ac0000/i2c@a90000!/soc@0/geniqup@ac0000/i2c@a94000!/soc@0/geniqup@ac0000/i2c@a98000!/soc@0/geniqup@ac0000/i2c@a9c000!/soc@0/geniqup@8c0000/spi@880000!/soc@0/geniqup@8c0000/spi@884000!/soc@0/geniqup@8c0000/spi@888000!/soc@0/geniqup@8c0000/spi@88c000!/soc@0/geniqup@8c0000/spi@890000!/soc@0/geniqup@8c0000/spi@894000!/soc@0/geniqup@8c0000/spi@898000!/soc@0/geniqup@8c0000/spi@89c000!/soc@0/geniqup@ac0000/spi@a80000!/soc@0/geniqup@ac0000/spi@a84000!/soc@0/geniqup@ac0000/spi@a88000!/soc@0/geniqup@ac0000/spi@a8c000!/soc@0/geniqup@ac0000/spi@a90000!/soc@0/geniqup@ac0000/spi@a94000!/soc@0/geniqup@ac0000/spi@a98000!/soc@0/geniqup@ac0000/spi@a9c000$/soc@0/geniqup@8c0000/serial@898000$ /soc@0/geniqup@ac0000/serial@a84000chosenserial0:115200n8memory@80000000memory+reserved-memory /hyp-mem@85700000+p`6xbl-mem@85e00000+6aop-mem@85fc0000+6aop-cmd-db-mem@85fe0000 Lqcom,cmd-db+6smem@86000000 Lqcom,smem+ 6=tz@86200000+ 6rmtfs@88f00000Lqcom,rmtfs-mem+ 6ETqseecom@8ab00000+@6camera-mem@8bf00000+P6ipa-fw@8c400000+@6ipa-gsi@8c410000+AP6gpu@8c415000+AP 6adsp@8c500000+P6^$wlan-msa@8df00000+6^mpss@8e000000+6^venus@95800000+P6^cdsp@95d00000+6^*mba@96500000+P 6^slpi@96700000+p@6spss@97b00000+6memory@9d400000+@@6ramoops@ffc00000Lramoops+fr6cpus cpu@0cpu Lqcom,kryo385+pscic( psci-< ^l2-cacheLcache< ^ l3-cacheLcache^ cpu@100cpu Lqcom,kryo385+pscic( psci-< ^l2-cacheLcache< ^ cpu@200cpu Lqcom,kryo385+pscic( psci-<^l2-cacheLcache< ^cpu@300cpu Lqcom,kryo385+pscic(- psci<^l2-cacheLcache< ^cpu@400cpu Lqcom,kryo385+psci( psci-<^l2-cacheLcache< ^cpu@500cpu Lqcom,kryo385+psci( psci-<^l2-cacheLcache< ^cpu@600cpu Lqcom,kryo385+psci( psci-<^ l2-cacheLcache< ^cpu@700cpu Lqcom,kryo385+psci( psci-<^!l2-cacheLcache< ^cpu-mapcluster0core0Mcore1Mcore2Mcore3Mcore4Mcore5Mcore6M core7M!idle-statesQpscicpu-sleep-0-0Larm,idle-state^little-rail-power-collapsen@^b^-cpu-sleep-1-0Larm,idle-state^big-rail-power-collapsen@m^.domain-idle-statescluster-sleep-0Ldomain-idle-state^cluster-power-collapsenAD '^/opp-table-cpu0Loperating-points-v2^opp-300000000 5I>opp-403200000X 5I>opp-4800000008 5bpopp-576000000"U 5bpopp-652800000& 5u0opp-748800000,opp-82560000015opp-9024000005Ɉ`opp-979200000:]hopp-1056000000>Hopp-1132800000C(!b@opp-1228800000I>!bopp-1324800000N!b opp-1420800000T.opp-1516800000Zh.'Popp-1612800000`!`>'Popp-1689600000d@>>opp-1766400000iI >V0opp-table-cpu4Loperating-points-v2^opp-300000000 5I>opp-403200000X 5I>opp-4800000008I>opp-576000000"UI>opp-652800000&I>opp-748800000,I>opp-82560000015!bopp-9024000005Ɉ!bopp-979200000:]h!bopp-1056000000>H.opp-1132800000C(.opp-1209600000H>opp-1286400000L>opp-1363200000Q@>opp-1459200000V>opp-1536000000[Ropp-1612800000`!`Ropp-1689600000d@R'Popp-1766400000iI ^'Popp-1843200000m^'Popp-1920000000rpn'Popp-1996800000wn>opp-2092800000|n>opp-2169600000Qxn>opp-2246400000Xn>opp-2323200000y8n>opp-2400000000 nV0opp-2476800000nV0opp-25536000004nV0opp-2649600000nV0opp-2745600000nopp-2803200000pnpmuLarm,armv8-pmuv3 timerLarm,armv8-timer0clocksxo-board Lfixed-clockI xo_board^sleep-clk Lfixed-clock^0firmwarescmLqcom,scm-sdm845qcom,scmremoteproc-adspLqcom,sdm845-adsp-pas@#""""#7wdogfatalreadyhandoverstop-ackG#NxoZ$h%q&stop disabledglink-edge lpass'apr Lqcom,apr-v2apr_audio_svc apr-service@3+ Lqcom,q6coreavs/audiomsm/adsp/audio_pdapr-service@4 Lqcom,q6afe+avs/audiomsm/adsp/audio_pddaisLqcom,q6afe-dais apr-service@7 Lqcom,q6asm+avs/audiomsm/adsp/audio_pddaisLqcom,q6asm-dais  (!apr-service@8 Lqcom,q6adm+avs/audiomsm/adsp/audio_pdroutingLqcom,q6adm-routingfastrpc Lqcom,fastrpcfastrpcglink-apps-dspadsp compute-cb@3Lqcom,fastrpc-compute-cb+ (#compute-cb@4Lqcom,fastrpc-compute-cb+ ($remoteproc-cdspLqcom,sdm845-cdsp-pas@#B))))#7wdogfatalreadyhandoverstop-ackG#NxoZ*h%q+stop disabledglink-edge >turing'fastrpc Lqcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@1Lqcom,fastrpc-compute-cb+ (0compute-cb@2Lqcom,fastrpc-compute-cb+ (0compute-cb@3Lqcom,fastrpc-compute-cb+ (0compute-cb@4Lqcom,fastrpc-compute-cb+ (0compute-cb@5Lqcom,fastrpc-compute-cb+ (0compute-cb@6Lqcom,fastrpc-compute-cb+ (0compute-cb@7Lqcom,fastrpc-compute-cb+ (0compute-cb@8Lqcom,fastrpc-compute-cb+ (0smp2p-cdsp Lqcom,smp2p/^ @'9master-kernelHmaster-kernelX^+slave-kernel Hslave-kernelo^)smp2p-lpass Lqcom,smp2p/ ' 9master-kernelHmaster-kernelX^&slave-kernel Hslave-kernelo^"smp2p-mpss Lqcom,smp2p/ '9master-kernelHmaster-kernelX^{slave-kernel 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::!qup-corequp-config L==Qtxrx disabledserial@880000Lqcom,geni-uart+@NseG4D4defaultB? Y 3<09 ::!qup-corequp-config disabledi2c@884000Lqcom,geni-i2c+@@NseG4F4defaultB@ Z  3<H9 ::9 !qup-corequp-configqup-memory L==Qtxrx disabledspi@884000Lqcom,geni-spi+@@NseG4F4defaultBA Z 09 ::!qup-corequp-config L==Qtxrx disabledserial@884000Lqcom,geni-uart+@@NseG4F4defaultBB Z 3<09 ::!qup-corequp-config disabledi2c@888000Lqcom,geni-i2c+@NseG4H4defaultBC [  3<H9 ::9 !qup-corequp-configqup-memory L==Qtxrx disabledspi@888000Lqcom,geni-spi+@NseG4H4defaultBD [ 09 ::!qup-corequp-config L==Qtxrx disabledserial@888000Lqcom,geni-uart+@NseG4H4defaultBE [ 3<09 ::!qup-corequp-config disabledi2c@88c000Lqcom,geni-i2c+@NseG4J4defaultBF \  3<H9 ::9 !qup-corequp-configqup-memory L==Qtxrx disabledspi@88c000Lqcom,geni-spi+@NseG4J4defaultBG \ 09 ::!qup-corequp-config L==Qtxrx disabledserial@88c000Lqcom,geni-uart+@NseG4J4defaultBH \ 3<09 ::!qup-corequp-config disabledi2c@890000Lqcom,geni-i2c+@NseG4L4defaultBI ]  3<H9 ::9 !qup-corequp-configqup-memory L==Qtxrx disabledspi@890000Lqcom,geni-spi+@NseG4L4defaultBJ ] 09 ::!qup-corequp-config L==Qtxrx disabledserial@890000Lqcom,geni-uart+@NseG4L4defaultBK ] 3<09 ::!qup-corequp-config disabledi2c@894000Lqcom,geni-i2c+@@NseG4N4defaultBL ^  3<H9 ::9 !qup-corequp-configqup-memory L==Qtxrxokayspi@894000Lqcom,geni-spi+@@NseG4N4defaultBM ^ 09 ::!qup-corequp-config L==Qtxrx disabledserial@894000Lqcom,geni-uart+@@NseG4N4defaultBN ^ 3<09 ::!qup-corequp-config disabledi2c@898000Lqcom,geni-i2c+@NseG4P4defaultBO _  3<H9 ::9 !qup-corequp-configqup-memory L==Qtxrx disabledspi@898000Lqcom,geni-spi+@NseG4P4defaultBP _ 09 ::!qup-corequp-config L==Qtxrx disabledserial@898000Lqcom,geni-uart+@NseG4P4defaultBQ _ 3<09 ::!qup-corequp-configokayi2c@89c000Lqcom,geni-i2c+@NseG4R4defaultBR `  3< disabledspi@89c000Lqcom,geni-spi+@NseG4R4defaultBS ` 09 ::!qup-corequp-config L==Qtxrx disabledserial@89c000Lqcom,geni-uart+@NseG4R4defaultBT ` 3<09 ::!qup-corequp-config disableddma-controller@0xa00000Lqcom,sdm845-gpi-dma+%&'()*+  ( disabled^Wgeniqup@ac0000Lqcom,geni-se-qup+` Nm-ahbs-ahbG4f4g ( /U : !qup-coreokayi2c@a80000Lqcom,geni-i2c+@NseG4T4defaultBV a  3<HU ::U !qup-corequp-configqup-memory LWWQtxrx disabledspi@a80000Lqcom,geni-spi+@NseG4T4defaultBX a 0U ::!qup-corequp-config LWWQtxrx disabledserial@a80000Lqcom,geni-uart+@NseG4T4defaultBY a 3<0U ::!qup-corequp-config disabledi2c@a84000Lqcom,geni-i2c+@@NseG4V4defaultBZ b  3<HU ::U !qup-corequp-configqup-memory LWWQtxrx disabledspi@a84000Lqcom,geni-spi+@@NseG4V4defaultB[ b 0U ::!qup-corequp-config LWWQtxrx disabledserial@a84000Lqcom,geni-debug-uart+@@NseG4V4defaultB\ b 3<0U ::!qup-corequp-configokayi2c@a88000Lqcom,geni-i2c+@NseG4X4defaultB] c  3<HU ::U !qup-corequp-configqup-memory LWWQtxrxokayspi@a88000Lqcom,geni-spi+@NseG4X4defaultB^ c 0U ::!qup-corequp-config LWWQtxrx disabledserial@a88000Lqcom,geni-uart+@NseG4X4defaultB_ c 3<0U ::!qup-corequp-config disabledi2c@a8c000Lqcom,geni-i2c+@NseG4Z4defaultB` d  3<HU ::U !qup-corequp-configqup-memory LWWQtxrx disabledspi@a8c000Lqcom,geni-spi+@NseG4Z4defaultBa d 0U ::!qup-corequp-config LWWQtxrx disabledserial@a8c000Lqcom,geni-uart+@NseG4Z4defaultBb d 3<0U ::!qup-corequp-config disabledi2c@a90000Lqcom,geni-i2c+@NseG4\4defaultBc e  3<HU ::U !qup-corequp-configqup-memory LWWQtxrx disabledspi@a90000Lqcom,geni-spi+@NseG4\4defaultBd e 0U ::!qup-corequp-config LWWQtxrx disabledserial@a90000Lqcom,geni-uart+@NseG4\4defaultBe e 3<0U ::!qup-corequp-config disabledi2c@a94000Lqcom,geni-i2c+@@NseG4^4defaultBf f  3<HU ::U !qup-corequp-configqup-memory LWWQtxrx disabledspi@a94000Lqcom,geni-spi+@@NseG4^4defaultBg f 0U ::!qup-corequp-config LWWQtxrx disabledserial@a94000Lqcom,geni-uart+@@NseG4^4defaultBh f 3<0U ::!qup-corequp-config disabledi2c@a98000Lqcom,geni-i2c+@NseG4`4defaultBi g  3<HU ::U !qup-corequp-configqup-memory LWWQtxrxokayspi@a98000Lqcom,geni-spi+@NseG4`4defaultBj g 0U ::!qup-corequp-config LWWQtxrx disabledserial@a98000Lqcom,geni-uart+@NseG4`4defaultBk g 3<0U ::!qup-corequp-config disabledi2c@a9c000Lqcom,geni-i2c+@NseG4b4defaultBl h  3< disabledHU ::U !qup-corequp-configqup-memory LWWQtxrxspi@a9c000Lqcom,geni-spi+@NseG4b4defaultBm h 0U ::!qup-corequp-config LWWQtxrx disabledserial@a9c000Lqcom,geni-uart+@NseG4b4defaultBn h 3<0U ::!qup-corequp-config disabledsystem-cache-controller@1100000Lqcom,sdm845-llcc +0[llcc_basellcc_broadcast_base Fpmu@114a000Lqcom,sdm845-llcc-bwmon+ D oopp-tableLoperating-points-v2^oopp-0 5opp-1opp-2.opp-3Ropp-4npmu@1436400%Lqcom,sdm845-bwmonqcom,msm8998-bwmon+Cd E popp-tableLoperating-points-v2^popp-0I>opp-1opp-2opp-3>opp-4pci@1c00000Lqcom,pcie-sdm845@+ `` `[parfdbielbiconfigpciev 8/` `0`0 7msi8G4.4)4+4-4/4040Npipeauxcfgbus_masterbus_slaveslave_q2atbu (((((((((( ( ( ( ( (((4pci 41pciephy disabledphy@1c06000Lqcom,sdm845-qmp-pcie-phy+` / G494+4,4:Nauxcfg_ahbrefrefgen4phy4: disabledphy@1c06200@+b(dhfpG4.Npipe0pcie_0_pipe_clk^1pci@1c08000Lqcom,pcie-sdm845@+ @@ @[parfdbielbiconfigpciev 8/@ @0@0 37msi@G4641434547484444Npipeauxcfgbus_masterbus_slaveslave_q2areftbu41$ (((((((((( (  (  (  (  ( ((4pci 42pciephy disabledphy@1c0a000Lqcom,sdm845-qhp-pcie-phy+ / G4943444:Nauxcfg_ahbrefrefgen4phy4: disabledphy@1c062000+G46Npipe0pcie_1_pipe_clk^2interconnect@1380000Lqcom,sdm845-mem-noc+8rq^interconnect@14e0000Lqcom,sdm845-dc-noc+Nqinterconnect@1500000Lqcom,sdm845-config-noc+PPq^:interconnect@1620000Lqcom,sdm845-system-noc+bq^vinterconnect@16e0000Lqcom,sdm845-aggre1-noc+nPq^9interconnect@1700000Lqcom,sdm845-aggre2-noc+pq^Uinterconnect@1740000Lqcom,sdm845-mmss-noc+tq^ufshc@1d84000+Lqcom,sdm845-ufshcqcom,ufshcjedec,ufs-2.0 +@%[stdice  rufsphy+ 44rst ({Ncore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clkice_core_clkHG4444#4444H? <4`рxh disabled^sphy@1d87000Lqcom,sdm845-qmp-ufs-phy+p / Nrefref_auxG44sufsphy disabledphy@1d87400P+tv|xz^rdma-controller@1dc4000Lqcom,bam-v1.7.0+@@ G#Nbam_clkMU0((((^tcrypto@1dfa000Lqcom,crypto-v5.4+ߠ`G4 4 #NifacebuscoreLttQrxtx0((((ipa@1e40000Lqcom,sdm845-ipa( ("0+pp @[ipa-regipa-sharedgsi8#7uu(7ipagsiipa-clock-queryipa-setup-readyG# NcoreHUUv :!memoryimemconfigqww*ipa-clock-enabled-validipa-clock-enabled disabledhwlock@1f40000Lqcom,tcsr-mutex+n^syscon@1f60000Lqcom,sdm845-tcsrsyscon+^~pinctrl@3400000Lqcom,sdm845-pinctrl+@ |oxyQ^xcci0-defaultgpio17gpio18cci_i2c^cci0-sleepgpio17gpio18cci_i2c^cci1-defaultgpio19gpio20cci_i2c^cci1-sleepgpio19gpio20cci_i2c^qspi-clkpinmuxgpio95 qspi_clkqspi-cs0pinmuxgpio90qspi_csqspi-cs1pinmuxgpio89qspi_csqspi-data01pinmux-datagpio91gpio92 qspi_dataqspi-data12pinmux-datagpio93gpio94 qspi_dataqup-i2c0-default^;pinmux gpio0gpio1qup0qup-i2c1-default^@pinmuxgpio17gpio18qup1qup-i2c2-default^Cpinmuxgpio27gpio28qup2qup-i2c3-default^Fpinmuxgpio41gpio42qup3qup-i2c4-default^Ipinmuxgpio89gpio90qup4qup-i2c5-default^Lpinmuxgpio85gpio86qup5qup-i2c6-default^Opinmuxgpio45gpio46qup6qup-i2c7-default^Rpinmuxgpio93gpio94qup7qup-i2c8-default^Vpinmuxgpio65gpio66qup8qup-i2c9-default^Zpinmux gpio6gpio7qup9qup-i2c10-default^]pinmuxgpio55gpio56qup10qup-i2c11-default^`pinmuxgpio31gpio32qup11qup-i2c12-default^cpinmuxgpio49gpio50qup12qup-i2c13-default^fpinmuxgpio105gpio106qup13qup-i2c14-default^ipinmuxgpio33gpio34qup14qup-i2c15-default^lpinmuxgpio81gpio82qup15qup-spi0-default^>pinmuxgpio0gpio1gpio2gpio3qup0configgpio0gpio1gpio2gpio3qup-spi1-default^Apinmuxgpio17gpio18gpio19gpio20qup1qup-spi2-default^Dpinmuxgpio27gpio28gpio29gpio30qup2qup-spi3-default^Gpinmuxgpio41gpio42gpio43gpio44qup3qup-spi4-default^Jpinmuxgpio89gpio90gpio91gpio92qup4qup-spi5-default^Mpinmuxgpio85gpio86gpio87gpio88qup5qup-spi6-default^Ppinmuxgpio45gpio46gpio47gpio48qup6qup-spi7-default^Spinmuxgpio93gpio94gpio95gpio96qup7qup-spi8-default^Xpinmuxgpio65gpio66gpio67gpio68qup8qup-spi9-default^[pinmuxgpio6gpio7gpio4gpio5qup9qup-spi10-default^^pinmuxgpio55gpio56gpio53gpio54qup10qup-spi11-default^apinmuxgpio31gpio32gpio33gpio34qup11qup-spi12-default^dpinmuxgpio49gpio50gpio51gpio52qup12qup-spi13-default^gpinmux gpio105gpio106gpio107gpio108qup13qup-spi14-default^jpinmuxgpio33gpio34gpio31gpio32qup14qup-spi15-default^mpinmuxgpio81gpio82gpio83gpio84qup15qup-uart0-default^?pinmux gpio2gpio3qup0qup-uart1-default^Bpinmuxgpio19gpio20qup1qup-uart2-default^Epinmuxgpio29gpio30qup2qup-uart3-default^Hpinmuxgpio43gpio44qup3qup-uart4-default^Kpinmuxgpio91gpio92qup4qup-uart5-default^Npinmuxgpio87gpio88qup5qup-uart6-default^Qpinmuxgpio47gpio48qup6qup-uart7-default^Tpinmuxgpio95gpio96qup7qup-uart8-default^Ypinmuxgpio67gpio68qup8qup-uart9-default^\pinmux gpio4gpio5qup9qup-uart10-default^_pinmuxgpio53gpio54qup10qup-uart11-default^bpinmuxgpio33gpio34qup11qup-uart12-default^epinmuxgpio51gpio52qup12qup-uart13-default^hpinmuxgpio107gpio108qup13qup-uart14-default^kpinmuxgpio31gpio32qup14qup-uart15-default^npinmuxgpio83gpio84qup15quat_mi2s_sleepmuxgpio58gpio59gpioconfiggpio58gpio59 quat_mi2s_activemuxgpio58gpio59 qua_mi2sconfiggpio58gpio59quat_mi2s_sd0_sleepmuxgpio60gpioconfiggpio60 quat_mi2s_sd0_activemuxgpio60 qua_mi2sconfiggpio60quat_mi2s_sd1_sleepmuxgpio61gpioconfiggpio61 quat_mi2s_sd1_activemuxgpio61 qua_mi2sconfiggpio61quat_mi2s_sd2_sleepmuxgpio62gpioconfiggpio62 quat_mi2s_sd2_activemuxgpio62 qua_mi2sconfiggpio62quat_mi2s_sd3_sleepmuxgpio63gpioconfiggpio63 quat_mi2s_sd3_activemuxgpio63 qua_mi2sconfiggpio63sdc2-default-state^clk sdc2_clkcmd sdc2_cmd data sdc2_data remoteproc@4080000Lqcom,sdm845-mss-pil +H [qdsp6rmbL# zzzzz07wdogfatalreadyhandoverstop-ackshutdown-ack@G4$4'44%4(4&4@#2Nifacebusmemgpll0_msssnoc_aximnoc_axiprngxoh%q{stop|} mss_restartpdc_reset&~0P@ 333 cxmxmss disabledmbaZmpssZglink-edge modem' clock-controller@5090000Lqcom,sdm845-gpucc+ G#44 8Nbi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_src^stm@6002000 Larm,coresight-stmarm,primecell + ([stm-basestm-stimulus-baseG% Napb_pclkout-portsportendpoint5^funnel@6041000+Larm,coresight-dynamic-funnelarm,primecell+G% Napb_pclkout-portsportendpoint5^in-ports port@7+endpoint5^funnel@6043000+Larm,coresight-dynamic-funnelarm,primecell+0G% Napb_pclkout-portsportendpoint5^in-ports port@5+endpoint5^funnel@6045000+Larm,coresight-dynamic-funnelarm,primecell+PG% Napb_pclkout-portsportendpoint5^in-ports port@0+endpoint5^port@2+endpoint5^replicator@6046000/Larm,coresight-dynamic-replicatorarm,primecell+`G% Napb_pclkout-portsportendpoint5^in-portsportendpoint5^etf@6047000 Larm,coresight-tmcarm,primecell+pG% Napb_pclkout-portsportendpoint5^in-ports port@1+endpoint5^etr@6048000 Larm,coresight-tmcarm,primecell+G% Napb_pclkEin-portsportendpoint5^etm@7040000"Larm,coresight-etm4xarm,primecell+MG% Napb_pclkXout-portsportendpoint5^etm@7140000"Larm,coresight-etm4xarm,primecell+MG% Napb_pclkXout-portsportendpoint5^etm@7240000"Larm,coresight-etm4xarm,primecell+$MG% Napb_pclkXout-portsportendpoint5^etm@7340000"Larm,coresight-etm4xarm,primecell+4MG% Napb_pclkXout-portsportendpoint5^etm@7440000"Larm,coresight-etm4xarm,primecell+DMG% Napb_pclkXout-portsportendpoint5^etm@7540000"Larm,coresight-etm4xarm,primecell+TMG% Napb_pclkXout-portsportendpoint5^etm@7640000"Larm,coresight-etm4xarm,primecell+dM G% Napb_pclkXout-portsportendpoint5^etm@7740000"Larm,coresight-etm4xarm,primecell+tM!G% Napb_pclkXout-portsportendpoint5^funnel@7800000+Larm,coresight-dynamic-funnelarm,primecell+G% Napb_pclkout-portsportendpoint5^in-ports port@0+endpoint5^port@1+endpoint5^port@2+endpoint5^port@3+endpoint5^port@4+endpoint5^port@5+endpoint5^port@6+endpoint5^port@7+endpoint5^funnel@7810000+Larm,coresight-dynamic-funnelarm,primecell+G% Napb_pclkout-portsportendpoint5^in-portsportendpoint5^mmc@8804000$Lqcom,sdm845-sdhciqcom,sdhci-msm-v5+@7hc_irqpwr_irqG4h4i#Nifacecorexo ( 3okay} x~B4defaultopp-tableLoperating-points-v2^opp-9600000|5opp-19200000$6opp-1000000007opp-201500000 `opp-table-qspiLoperating-points-v2^opp-19200000$5opp-1000000006opp-150000000р7opp-3000000008spi@88df000Lqcom,sdm845-qspiqcom,qspi-v1+  RG44 Nifacecore 3 disabledslim@171c0000Lqcom,slim-ngd-v2.1.0+ xpokay LQrxtxtx2rx2 ( ngd@1+ ifd@0 Lslim217,250+^codec@1 Lslim217,250+ #x6o|mclkw@w@w@,w@ ^gpio-controller@42Lqcom,wcd9340-gpio|+Bswm@c85Lqcom,soundwire-v1.3.0+ @#DTc??|   GNiface lmh@17d70800Lqcom,sdm845-lmh+ !q$so^lmh@17d78800Lqcom,sdm845-lmh+׈  q$so^soundphy@88e2000(Lqcom,sdm845-qusb2-phyqcom,qusb2-v2-phy+ okayG4# Ncfg_ahbref4    ,^phy@88e3000(Lqcom,sdm845-qusb2-phyqcom,qusb2-v2-phy+0 disabledG4# Ncfg_ahbref4  ^phy@88e9000Lqcom,sdm845-qmp-usb3-phy + disabled / G4444Nauxcfg_ahbrefcom_aux44 phycommonphy@88e9200`+((G4Npipe0usb3_phy_pipe_clk_srcphy@88eb000Lqcom,sdm845-qmp-usb3-uni-phy+ disabled / G4444Nauxcfg_ahbrefcom_aux44 phycommonphy@88eb200@+(pG4Npipe0usb3_uni_phy_pipe_clk_src^usb@a6f8800Lqcom,sdm845-dwc3qcom,dwc3+ ookay /(G4 4444#Ncfg_noccoreifacesleepmock_utmi44$р027hs_phy_irqss_phy_irqdm_hs_phy_irqdp_hs_phy_irq 440U:)!usb-ddrapps-usb Ausb@a600000 Lsnps,dwc3+ `  (@ ^ w usb2-phy peripheral high-speedusb@a8f8800Lqcom,sdm845-dwc3qcom,dwc3+  disabled /(G4 4444#Ncfg_noccoreifacesleepmock_utmi44$р027hs_phy_irqss_phy_irqdm_hs_phy_irqdp_hs_phy_irq 440U:*!usb-ddrapps-usbusb@a800000 Lsnps,dwc3+   (` ^ wusb2-phyusb3-phyvideo-codec@aa00000Lqcom,sdm845-venus-v2+    3venusvcodec0vcodec1cx8G  ANcoreifacebusvcodec0_corevcodec0_busvcodec1_corevcodec1_bus((Z0:+!video-memcpu-cfg disabledvideo-core0Lvenus-decodervideo-core1Lvenus-encoderopp-tableLoperating-points-v2^opp-1000000005opp-200000000 6opp-3200000007opp-380000000Wopp-444000000v8opp-533000097clock-controller@ab00000Lqcom,sdm845-videocc+ G#Nbi_tcxo^camss@acb3000Lqcom,sdm845-camss+ 0 ˠ ̀ P ` p ƀ @ `@ @@E[csid0csid1csid2csiphy0csiphy1csiphy2csiphy3vfe0vfe1vfe_litexE7csid0csid1csid2csiphy0csiphy1csiphy2csiphy3vfe0vfe1vfe_lite  G %&,-23  44RS!"$#()+*/10Ncamnoc_axicpas_ahbcphy_rx_srccsi0csi0_srccsi1csi1_srccsi2csi2_srccsiphy0csiphy0_timercsiphy0_timer_srccsiphy1csiphy1_timercsiphy1_timer_srccsiphy2csiphy2_timercsiphy2_timer_srccsiphy3csiphy3_timercsiphy3_timer_srcgcc_camera_ahbgcc_camera_axislow_ahb_srcsoc_ahbvfe0_axivfe0vfe0_cphy_rxvfe0_srcvfe1_axivfe1vfe1_cphy_rxvfe1_srcvfe_litevfe_lite_cphy_rxvfe_lite_src0((( (  disabledports cci@ac4a000Lqcom,sdm845-cci + Ġ@  0GSR 5Ncamnoc_axisoc_ahbslow_ahb_srccpas_ahbccicci_srcĴ<4`4defaultsleepB  disabledi2c-bus@0+B@ i2c-bus@1+B@ clock-controller@ad00000Lqcom,sdm845-camcc+ G#Nbi_tcxo^opp-table-dsiLoperating-points-v2^opp-19200000$5opp-180000000 6opp-275000000d*7opp-328580000opp-358000000V8mdss@ae00000Lqcom,sdm845-mdss+ [mdss G  Nifacecore So0!mdp0-memmdp1-mem((  disabled /^display-controller@ae01000Lqcom,sdm845-dpu +   [mdpvbif(G4 Ngcc-busifacebuscorevsync$ 3ports port@0+endpoint5^port@1+endpoint5^opp-tableLoperating-points-v2^opp-19200000$5opp-171428571 76opp-344000000opp-430000000G8dsi@ae94000Lqcom,mdss-dsi-ctrl+ @ [dsi_ctrl0G$Nbytebyte_intfpixelcoreifacebus  3dsi disabled ports port@0+endpoint5^port@1+endpointdsi-phy@ae94400Lqcom,dsi-phy-10nm0+ D F J[dsi_phydsi_phy_lanedsi_pllG# Nifaceref disabled^dsi@ae96000Lqcom,mdss-dsi-ctrl+ ` [dsi_ctrl0G $Nbytebyte_intfpixelcoreifacebus  3dsi disabled ports port@0+endpoint5^port@1+endpointdsi-phy@ae96400Lqcom,dsi-phy-10nm0+ d f j[dsi_phydsi_phy_lanedsi_pllG# Nifaceref disabled^gpu@5000000Lqcom,adreno-630.2qcom,adreno + [kgsl_3d0_reg_memorycx_mem , !gfx-mem disabledopp-tableLoperating-points-v2^opp-710000000*Q nopp-675000000(; nopp-596000000#= @^opp-520000000 ^opp-414000000# >opp-342000000b )opp-257000000Q@ @%iommu@50400002Lqcom,sdm845-smmu-v2qcom,adreno-smmuqcom,smmu-v2+  xlmnopqrsG4!4 Nbusiface ^gmu@506a000&Lqcom,adreno-gmu-630.2qcom,adreno-gmu0+ ( H[gmugmu_pdcgmu_pdc_seq017hfigmu G44!Ngmucxoaximemnoc cxgx disabled^opp-tableLoperating-points-v2^opp-400000000ׄ opp-200000000  0clock-controller@af00000Lqcom,sdm845-dispcc+ @G#44Nbi_tcxogcc_disp_gpll0_clk_srcgcc_disp_gpll0_div_clk_srcdsi0_phy_pll_out_byteclkdsi0_phy_pll_out_dsiclkdsi1_phy_pll_out_byteclkdsi1_phy_pll_out_dsiclkdp_link_clk_divsel_tendp_vco_divided_clk_src_mux^interrupt-controller@b220000Lqcom,sdm845-pdcqcom,pdc+ "$ ^^asvo^yreset-controller@b2e0000Lqcom,sdm845-pdc-global+ .^}thermal-sensor@c263000 Lqcom,sdm845-tsensqcom,tsens-v2 + &0 "  7uplowcritical ^thermal-sensor@c265000 Lqcom,sdm845-tsensqcom,tsens-v2 + &P "0 7uplowcritical ^reset-controller@c2a0000Lqcom,sdm845-aoss-cc+ *^|power-controller@c300000#Lqcom,sdm845-aoss-qmpqcom,aoss-qmp+ 0 '^%cx-ebi-sram@c3f0000Lqcom,sdm845-rpmh-stats+ ?spmi@c440000Lqcom,spmi-pmic-arbP+ D ``p @`[corechnlsobsrvrintrcnfg 7periph_irq M - o :pmic@4Lqcom,pm8005qcom,spmi-pmic+ gpios@c000 Lqcom,pm8005-gpioqcom,spmi-gpio+|o^pmic@5Lqcom,pm8005qcom,spmi-pmic+ regulatorsLqcom,pm8005-regulatorspmic@0Lqcom,pm8998qcom,spmi-pmic+ pon@800Lqcom,pm8998-pon+ E UpwrkeyLqcom,pm8941-pwrkey c=  lttemp-alarm@2400Lqcom,spmi-temp-alarm+$$ w thermal ^coincell@2800Lqcom,pm8941-coincell+( disabledadc@3100Lqcom,spmi-adc-rev2+11  ^adc-chan@6+ die_tempadc-tm@3400Lqcom,spmi-adc-tm-hc+44   disabledrtc@6000Lqcom,pm8941-rtc+`a [rtcalarmagpios@c000 Lqcom,pm8998-gpioqcom,spmi-gpio+|o^pmic@1Lqcom,pm8998qcom,spmi-pmic+ pmic@2Lqcom,pmi8998qcom,spmi-pmic+ gpios@c000!Lqcom,pmi8998-gpioqcom,spmi-gpio+|o^pmic@3Lqcom,pmi8998qcom,spmi-pmic+ labibbLqcom,pmi8998-lab-ibbibb  7sc-errocplab  7sc-errocppwmLqcom,pmi8998-lpg   disabledleds@d800Lqcom,pmi8998-wled+  7ovpshort backlight disabledsram@146bf000#Lqcom,sdm845-imemsysconsimple-mfd+k /kpil-reloc@94cLqcom,pil-reloc-info+ Liommu@15000000!Lqcom,sdm845-smmu-500arm,mmu-500+   A`abcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVW^(clock-controller@17014000Lqcom,sdm845-lpasscc +@0 [ccqdsp6ss disabledinterconnect@17900000Lqcom,sdm845-gladiator-noc+Ѐq^watchdog@17980000#Lqcom,apss-wdt-sdm845qcom,kpss-wdt+G0 mailbox@17990000Lqcom,sdm845-apss-shared+ ^'rsc@179c0000 apps_rscLqcom,rpmh-rsc0+[drv-0drv-1drv-2$    ,bcm-voterLqcom,bcm-voter^qclock-controllerLqcom,sdm845-rpmh-clkNxoG^#power-controllerLqcom,sdm845-rpmhpd^3opp-tableLoperating-points-v2^opp1 opp2 0^5opp3 @^6opp4 ^7opp5 ^opp6 ^8opp7 @opp8 Popp9 ^opp10 regulators-0Lqcom,pm8998-rpmh-regulators a     . < J X f t          " 0 G ^ q   smps2  smps3 @ @^smps5    ^smps7  ^ldo1 m m ^ldo2 O O  ldo3 B@ B@ ldo5 5 5 ldo6 R R ldo7 w@ w@ ldo8 O   ldo9 @ , ldo10 @ , ldo11 B@  ldo12 w@ w@ ^ldo13 w@ -* ^ldo14 w@ w@ ldo15 w@ w@ ldo16 )B )B ldo17   ldo18 )B -* ldo19 )2 )2  disabledldo20 )B -* ldo21 )B -* ^ldo22 * * ldo23 - 2 ldo24 / / ^ldo25 - 2 ldo26 O O ldo28 +@ - lvs1 w@ w@ lvs2 w@ w@ regulators-1Lqcom,pmi8998-rpmh-regulators bbob 2 6 ^regulators-2Lqcom,pm8005-rpmh-regulators c    smps3 ' 'interrupt-controller@17a00000 Larm,gic-v3 /o +  ^msi-controller@17a40000Larm,gic-v3-its  #+ disableddma-controller@17184000Lqcom,bam-v1.7.0U+@ . M ; (^timer@17c90000 / Larm,armv7-timer-mem+frame@17ca0000 H+frame@17cc0000 H + disabledframe@17cd0000 H  + disabledframe@17ce0000 H  + disabledframe@17cf0000 H  + disabledframe@17d00000 H  + disabledframe@17d10000 H  + disabledinterconnect@17d41000Lqcom,sdm845-osm-l3+G#4 Nxoalternate^cpufreq@17d43000Lqcom,cpufreq-hw +0X[freq-domain0freq-domain1#G#4 Nxoalternate U^wifi@18800000Lqcom,wcn3990-wifi disabled+[membaseZNcxo_ref_clk_pinG# (@thermal-zonescpu0-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalcpu1-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalcpu2-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalcpu3-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalcpu4-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalcpu5-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalcpu6-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalcpu7-thermal h ~ tripstrip-point0 _ &passivetrip-point1 s &passivecpu_crit   &criticalaoss0-thermal h ~ tripstrip-point0 _ &hotcluster0-thermal h ~ tripstrip-point0 _ &hotcluster0_crit   &criticalcluster1-thermal h ~ tripstrip-point0 _ &hotcluster1_crit   &criticalgpu-top-thermal h ~ tripstrip-point0 _ &hotgpu-bottom-thermal h ~ tripstrip-point0 _ &hotaoss1-thermal h ~ tripstrip-point0 _ &hotq6-modem-thermal h ~ tripstrip-point0 _ &hotmem-thermal h ~ tripstrip-point0 _ &hotwlan-thermal h ~ tripstrip-point0 _ &hotq6-hvx-thermal h ~ tripstrip-point0 _ &hotcamera-thermal h ~ tripstrip-point0 _ &hotvideo-thermal h ~ tripstrip-point0 _ &hotmodem-thermal h ~ tripstrip-point0 _ &hotpm8998-thermal h ~ tripspm8998-alert0 ( &passivepm8998-crit H  &criticalgpio-keys Lgpio-keyskey-vol-down volume_down  lr  vph-pwr-regulatorLregulator-fixed vph_pwr 8u  8u ^pm8998-smps4Lregulator-fixed vreg_s4a_1p8 w@ w@   ^ interrupt-parent#address-cells#size-cellsqcom,msm-idqcom,board-idmodelcompatiblei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11i2c12i2c13i2c14i2c15spi0spi1spi2spi3spi4spi5spi6spi7spi8spi9spi10spi11spi12spi13spi14spi15serial0serial1stdout-pathdevice_typeregrangesno-maphwlocksqcom,client-idqcom,vmidphandlerecord-sizeconsole-sizeftrace-sizepmsg-sizeecc-sizeenable-methodcapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domainoperating-points-v2interconnectspower-domainspower-domain-names#cooling-cellsnext-level-cachecpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-peak-kBpsinterrupts#clock-cellsclock-frequencyclock-output-namesinterrupts-extendedinterrupt-namesclocksclock-namesmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesstatuslabelqcom,remote-pidmboxesqcom,glink-channelsqcom,domainqcom,intentsqcom,protection-domain#sound-dai-cellsiommusqcom,non-secure-domainqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#power-domain-cellsdomain-idle-statesdma-ranges#reset-cellsprotected-clocksbitsrequired-opps#dma-cellsdma-channelsdma-channel-maskinterconnect-namespinctrl-namespinctrl-0dmasdma-namesreg-nameslinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-namesassigned-clocksassigned-clock-rates#phy-cells#interconnect-cellsqcom,bcm-voterslanes-per-directionfreq-table-hzqcom,eeqcom,controlled-remotely#hwlock-cellsgpio-controller#gpio-cellsgpio-rangeswakeup-parentgpio-reserved-rangespinsfunctionbias-pull-updrive-strengthbias-pull-downbias-disableinput-enableoutput-highqcom,halt-regsremote-endpointarm,scatter-gatherarm,coresight-loses-context-with-cpuvmmc-supplyvqmmc-supplycd-gpiosbus-widthno-sdiono-emmcqcom,apps-ch-pipesqcom,ea-pcslim-ifc-devqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,dout-portsqcom,din-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2cpusqcom,lmh-temp-arm-millicelsiusqcom,lmh-temp-low-millicelsiusqcom,lmh-temp-high-millicelsiusnvmem-cellsvdd-supplyvdda-pll-supplyvdda-phy-dpdm-supplyqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkdr_modemaximum-speedpinctrl-1assigned-clock-parentsqcom,gmuopp-level#iommu-cells#global-interruptsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelcell-indexmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cells#pwm-cells#mbox-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-s11-supplyvdd-s12-supplyvdd-s13-supplyvdd-l1-l27-supplyvdd-l2-l8-l17-supplyvdd-l3-l11-supplyvdd-l4-l5-supplyvdd-l6-supplyvdd-l7-l12-l14-l15-supplyvdd-l9-supplyvdd-l10-l23-l25-supplyvdd-l13-l19-l21-supplyvdd-l16-l28-supplyvdd-l18-l22-supplyvdd-l20-l24-supplyvdd-l26-supplyvin-lvs-1-2-supplyregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onmsi-controller#msi-cellsnum-channelsqcom,num-eesframe-number#freq-domain-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisdebounce-intervalgpio-key,wakeupregulator-nameregulator-boot-onvin-supply