Ðþí  £   8  l   (            7  4                                                                   "   ,sprd,sc9836-openphone sprd,sc9836         "   7Spreadtrum SC9836 Openphone Board      soc          ,simple-bus                                     =   ap-apb           ,simple-bus                                     =   serial@70000000          ,sprd,sc9836-uart             D    p                   H                  S            Zokay          serial@70100000          ,sprd,sc9836-uart             D    p                  H                  S            Zokay          serial@70200000          ,sprd,sc9836-uart             D    p                   H                  S            Zokay          serial@70300000          ,sprd,sc9836-uart             D    p0                  H                  S            Zokay                clk26mhz             ,fixed-clock          a             nŒº€         ~         cpus                                 cpu@0            †cpu          ,arm,cortex-a53           D                 ’psci             ~   
      cpu@1            †cpu          ,arm,cortex-a53           D                ’psci             ~         cpu@2            †cpu          ,arm,cortex-a53           D                ’psci             ~         cpu@3            †cpu          ,arm,cortex-a53           D                ’psci             ~            etf@10003000              ,arm,coresight-tmc arm,primecell          D     0                 S         	    apb_pclk       in-ports       port       endpoint             ¬            ~                  funnel@10001000       +   ,arm,coresight-dynamic-funnel arm,primecell           D                      S         	    apb_pclk       out-ports      port       endpoint             ¬            ~               in-ports                                 port@0           D       endpoint             ¬            ~            port@1           D      endpoint             ¬            ~            port@2           D      endpoint             ¬            ~            port@3           D      endpoint             ¬            ~            port@4           D      endpoint             ¬   	         ~                  etm@10440000          "   ,arm,coresight-etm4x arm,primecell            D    D                  ¼   
         S         	    apb_pclk       out-ports      port       endpoint             ¬            ~                  etm@10540000          "   ,arm,coresight-etm4x arm,primecell            D    T                  ¼            S         	    apb_pclk       out-ports      port       endpoint             ¬            ~                  etm@10640000          "   ,arm,coresight-etm4x arm,primecell            D    d                  ¼            S         	    apb_pclk       out-ports      port       endpoint             ¬            ~                  etm@10740000          "   ,arm,coresight-etm4x arm,primecell            D    t                  ¼            S         	    apb_pclk       out-ports      port       endpoint             ¬            ~                  stm@10006000              ,arm,coresight-stm arm,primecell           D     `                               Àstm-base stm-stimulus-base           S         	    apb_pclk       out-ports      port       endpoint             ¬            ~   	               interrupt-controller@12001000            ,arm,gic-400       @   D                                 @              `                  Ê             Û         H      	           ~         psci          	   ,arm,psci             ™smc          ðÄ           ÷„           ÿÄ        timer            ,arm,armv8-timer       0   H                              
        aliases         /soc/ap-apb/serial@70000000         /soc/ap-apb/serial@70100000         /soc/ap-apb/serial@70200000         #/soc/ap-apb/serial@70300000       memory@80000000          †memory           D    €                 chosen          +serial1:115200n8             	interrupt-parent #address-cells #size-cells compatible model ranges reg interrupts clocks status #clock-cells clock-frequency phandle device_type enable-method clock-names remote-endpoint cpu reg-names #interrupt-cells interrupt-controller cpu_on cpu_off cpu_suspend serial0 serial1 serial2 serial3 stdout-path 