  i   8  l   (            
  4                                 google,kappa mediatek,mt8183                                     +            7Google kappa board     aliases          =/soc/i2c@11007000            B/soc/i2c@11011000            G/soc/i2c@11009000            L/soc/i2c@1100f000            Q/soc/i2c@11008000            V/soc/i2c@11016000            [/soc/i2c@11005000            `/soc/i2c@1101a000            e/soc/i2c@1101b000            j/soc/i2c@11014000            o/soc/i2c@11015000            u/soc/i2c@11017000            {/soc/ovl@14008000            /soc/ovl@14009000            /soc/ovl@1400a000            /soc/rdma@1400b000           /soc/rdma@1400c000           /soc/serial@11002000             /soc/mmc@11230000            /soc/mmc@11240000         opp-table-cluster0            operating-points-v2                           opp0-793000000               /D8@          	                  opp0-910000000               6=          
}                  opp0-1014000000              <pi          
                  opp0-1131000000              Ci                            opp0-1248000000              Jb           5                   opp0-1326000000              O	'          ~>                  opp0-1417000000              Tu@          P                  opp0-1508000000              YA           A            	      opp0-1586000000              ^p          6            
      opp0-1625000000              `ۈ@          
                  opp0-1677000000              c@          5                  opp0-1716000000              fH           f                  opp0-1781000000              j'@                            opp0-1846000000              n          B@                  opp0-1924000000              r                             opp0-1989000000              v@                               opp-table-cluster1            operating-points-v2                       #   opp1-793000000               /D8@          
`                  opp1-910000000               6=                            opp1-1014000000              <pi          q                  opp1-1131000000              Ci          X                  opp1-1248000000              Jb           5                   opp1-1326000000              O	'                            opp1-1417000000              Tu@          P                  opp1-1508000000              YA           Y            	      opp1-1586000000              ^p                      
      opp1-1625000000              `ۈ@          t                  opp1-1677000000              c@          5                  opp1-1716000000              fH           ~                  opp1-1781000000              j'@                            opp1-1846000000              n          B@                  opp1-1924000000              r                             opp1-1989000000              v@                               opp-table-cci             operating-points-v2                          opp-273000000                E@          	                  opp-338000000                %x          
}                  opp-403000000                J          
                  opp-463000000                                            opp-546000000                 L          5                   opp-624000000                %1|           ~>                  opp-689000000                )N@          P                  opp-767000000                -}          A            	      opp-845000000                2]@          6            
      opp-871000000                3g          
                  opp-923000000                7          5                  opp-962000000                9V          f                  opp-1027000000               =6                            opp-1092000000               A           B@                  opp-1144000000               D0                             opp-1196000000               GI                                cci           mediatek,mt8183-cci                               cci intermediate                                       !      cpus                         +       cpu-map    cluster0       core0                    core1                    core2                    core3                       cluster1       core0                    core1                    core2                    core3                          cpu@0           cpu           arm,cortex-a53          '            +psci            9          L                                     cpu intermediate                         \   T        v              !                             cpu@1           cpu           arm,cortex-a53          '           +psci            9          L                                     cpu intermediate                         \   T        v              !                             cpu@2           cpu           arm,cortex-a53          '           +psci            9          L                                     cpu intermediate                         \   T        v              !                             cpu@3           cpu           arm,cortex-a53          '           +psci            9          L                                     cpu intermediate                         \   T        v              !                             cpu@100         cpu           arm,cortex-a73          '           +psci            9           L      "                              cpu intermediate                #        \           v              !           $                  cpu@101         cpu           arm,cortex-a73          '          +psci            9           L      "                              cpu intermediate                #        \           v              !           $                  cpu@102         cpu           arm,cortex-a73          '          +psci            9           L      "                              cpu intermediate                #        \           v              !           $                  cpu@103         cpu           arm,cortex-a73          '          +psci            9           L      "                              cpu intermediate                #        \           v              !           $                  idle-states         psci       cpu-sleep             arm,idle-state                                                                        cluster-sleep-0           arm,idle-state                                                                     cluster-sleep-1           arm,idle-state                                                               "            opp-table-0           operating-points-v2                       u   opp-300000000                           	h P      opp-320000000                           	 P      opp-340000000                C           	< P      opp-360000000                u*           	Ҧ P      opp-380000000                W           	 P      opp-400000000                ׄ           
z P      opp-420000000                           
 P      opp-460000000                k           
L P      opp-500000000                e           
} P      opp-540000000                 /           
` P      opp-580000000                "           
4 P      opp-620000000                $s            P      opp-653000000                &@          YF P      opp-698000000                )           A      opp-743000000                ,IG           6      opp-800000000                /            H         pmu-a53           arm,cortex-a53-pmu              %                    &      pmu-a73           arm,cortex-a73-pmu              %                    '      psci              arm,psci-1.0            2smc       fixed-factor-clock-13m            fixed-factor-clock                          (                              &clk13m              5      oscillator            fixed-clock                     9        &clk26m              (      timer             arm,armv8-timer             %      @                                               
             soc                      +             simple-bus           I   efuse@8000000         %    mediatek,mt8183-efuse mediatek,efuse            '                                   +           Pokay          interrupt-controller@c000000              arm,gic-v3          W               %         h      P  '                                @              A             B                        	                }            %   ppi-partitions     interrupt-partition-0                                   &      interrupt-partition-1                                   '            syscon@c530000            mediatek,mt8183-mcucfg syscon           '    S                                      interrupt-controller@c530a80          .    mediatek,mt8183-sysirq mediatek,mt6577-sysirq            h        W               %        '    S
       P                  cpu-debug@d410000         &    arm,coresight-cpu-debug arm,primecell           '    A                     )   .      	   apb_pclk                     cpu-debug@d510000         &    arm,coresight-cpu-debug arm,primecell           '    Q                     )   .      	   apb_pclk                     cpu-debug@d610000         &    arm,coresight-cpu-debug arm,primecell           '    a                     )   .      	   apb_pclk                     cpu-debug@d710000         &    arm,coresight-cpu-debug arm,primecell           '    q                     )   .      	   apb_pclk                     cpu-debug@d810000         &    arm,coresight-cpu-debug arm,primecell           '                         )   .      	   apb_pclk                     cpu-debug@d910000         &    arm,coresight-cpu-debug arm,primecell           '                         )   .      	   apb_pclk                     cpu-debug@da10000         &    arm,coresight-cpu-debug arm,primecell           '                         )   .      	   apb_pclk                     cpu-debug@db10000         &    arm,coresight-cpu-debug arm,primecell           '                         )   .      	   apb_pclk                     syscon@10000000            mediatek,mt8183-topckgen syscon         '                                           syscon@10001000            mediatek,mt8183-infracfg syscon         '                                               )      syscon@10003000           mediatek,mt8183-pericfg syscon          '     0                               f      pinctrl@10005000              mediatek,mt8183-pinctrl         '     P                                                                                                                                   D  iocfg0 iocfg1 iocfg2 iocfg3 iocfg4 iocfg5 iocfg6 iocfg7 iocfg8 eint                                *                    h                          W          SPI_AP_EC_CS_L SPI_AP_EC_MOSI SPI_AP_EC_CLK I2S3_DO USB_PD_INT_ODL     IT6505_HPD_L I2S3_TDM_D3 SOC_I2C6_1V8_SCL SOC_I2C6_1V8_SDA DPI_D0 DPI_D1 DPI_D2 DPI_D3 DPI_D4 DPI_D5 DPI_D6 DPI_D7 DPI_D8 DPI_D9 DPI_D10 DPI_D11 DPI_HSYNC DPI_VSYNC DPI_DE DPI_CK AP_MSDC1_CLK AP_MSDC1_DAT3 AP_MSDC1_CMD AP_MSDC1_DAT0 AP_MSDC1_DAT2 AP_MSDC1_DAT1       OTG_EN DRVBUS DISP_PWM DSI_TE LCM_RST_1V8 AP_CTS_WIFI_RTS AP_RTS_WIFI_CTS SOC_I2C5_1V8_SCL SOC_I2C5_1V8_SDA SOC_I2C3_1V8_SCL SOC_I2C3_1V8_SDA                              SOC_I2C1_1V8_SDA SOC_I2C0_1V8_SDA SOC_I2C0_1V8_SCL SOC_I2C1_1V8_SCL AP_SPI_H1_MISO AP_SPI_H1_CS_L AP_SPI_H1_MOSI AP_SPI_H1_CLK I2S5_BCK I2S5_LRCK I2S5_DO BOOTBLOCK_EN_L MT8183_KPCOL0 SPI_AP_EC_MISO UART_DBG_TX_AP_RX UART_AP_TX_DBG_RX I2S2_MCK I2S2_BCK CLK_5M_WCAM CLK_2M_UCAM I2S2_LRCK I2S2_DI SOC_I2C2_1V8_SCL SOC_I2C2_1V8_SDA SOC_I2C4_1V8_SCL SOC_I2C4_1V8_SDA  SCL8 SDA8 FCAM_PWDN_L                          I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC       AP_FLASH_WP_L EC_AP_INT_ODL IT6505_INT_ODL H1_INT_OD_L        AP_SPI_FLASH_MISO AP_SPI_FLASH_CS_L AP_SPI_FLASH_MOSI AP_SPI_FLASH_CLK DA7219_IRQ                                        *   audiopins                  pins_bus          D    a  b  e  f    Y  Z  [                           audiotdmouton                  pins_bus                        
                    audiotdmoutoff                 pins_bus                             
                                       bt-pins             @   pins_bt_en            x          '         ec_ap_int_odl               ^   pins1                                2         h1_int_od_l             O   pins1                                i2c0                C   pins_bus              R  S        ?           T             i2c1                \   pins_bus              Q  T        ?           T             i2c2                L   pins_bus              g  h         p        T             i2c3                Z   pins_bus              2  3        ?           T             i2c4                E   pins_bus              i  j         p        T             i2c5                `   pins_bus              0  1        ?           T             i2c6                B   pins_bus                         p         mmc0-pins-default               j   pins_cmd_dat          $    {    }    ~        z                            ?         pins_clk              |                   }   
      pins_rst                                 }            mmc0-pins-uhs               k   pins_cmd_dat          $    {    }    ~        z                            ?         pins_clk              |                   }   
      pins_ds                              }   
      pins_rst                                 ?            mmc1-pins-default               n   pins_cmd_dat                   "  !                   ?   
      pins_clk                               }   
         mmc1-pins-uhs               o   pins_cmd_dat                   "  !                              ?   
      pins_clk                                 }   
                  panel_pins_default     panel_reset           -          '         2         pwm0_pin_default                Y   pins1                                2      pins2             +         scp             4   pins_scp_uart             n  p         spi0                N   pins_spi              U  V   W  X         p         spi1                [   pins_spi                             p         spi2                ]   pins_spi                            p      pins_spi_mi           ^        }             spi3                _   pins_spi                             p         spi4                b   pins_spi                             p         spi5                c   pins_spi                             p         uart0-pins-default              =   pins_rx           _                  2      pins_tx           `         uart1-pins-default              >   pins_rx           y                  2      pins_tx           s      pins_rts              /               pins_cts              .                  uart1-pins-sleep                ?   pins_rx           y                   2      pins_tx           s      pins_rts              /               pins_cts              .                  wifi-pins-pwrseq                   pins_wifi_enable              w          '         wifi-pins-wakeup                   pins_wifi_wakeup              q                   pp1200-mipibrdg-en                 pins1             6          '         pp1800-lcd-en                  pins1             $          '         pp3300-panel-pins                  panel-3v3-enable              #          '         ppvarp-lcd-en      pins1             B          '         ppvarn-lcd-en      pins1                       '         anx7625-pins                F   pins1             -   I          '      pins2                                2         touchscreen-pins                D   touch_int_odl                                2      touch_rst_l                              trackpad-pins               M   trackpad_int                                 p         vddio-mipibrdg-en                  pins1             %          '         volume-button-pins                 voldn-btn-odl                                2      volup-btn-odl                                2         ts3a227e_pins               a   pins1                                2            syscon@10006000       )    mediatek,mt8183-scpsys syscon simple-mfd            '     `           power-controller          !    mediatek,mt8183-power-controller                         +                           X   power-domain@0          '                      )   /   )   7         audio audio1 audio2                   power-domain@1          '              )                  power-domain@2          '                           mfg                      +                          +   power-domain@3          '                        +                          ,   power-domain@4          '                     power-domain@5          '                     power-domain@6          '              )                        power-domain@7          '         X            -       -      -      -      -      -      -      -      -      -   	      5   mm mm-0 mm-1 mm-2 mm-3 mm-4 mm-5 mm-6 mm-7 mm-8 mm-9               )           .                     +                  power-domain@8          '         @            /       /   	   /      /      /      /      /         .   cam cam-0 cam-1 cam-2 cam-3 cam-4 cam-5 cam-6              )           .                  power-domain@9          '   	               "   0   	   0            isp isp-0 isp-1            )           .                  power-domain@10         '   
           .                  power-domain@11         '              .                  power-domain@12         '         @         &      #   1       1      1      1      1      1         -   vpu vpu1 vpu-0 vpu-1 vpu-2 vpu-3 vpu-4 vpu-5               )           .                     +                  power-domain@13         '                  $         vpu2               )                  power-domain@14         '                  %         vpu3               )                              watchdog@10007000             mediatek,mt8183-wdt         '     p                               h      syscon@1000c000       "    mediatek,mt8183-apmixedsys syscon           '                                    S      pwrap@1000d000            mediatek,mt8183-pwrap           '                     pwrap                                    )   )         	   spi wrap       mt6358            mediatek,mt6358          h            *                      W      mt6358codec           mediatek,mt6358-sound                         2      mt6358regulator           mediatek,mt6358-regulator      buck_vdram1         vdram1                    5 L        M  0        b             ~                     buck_vcore          vcore                     5         M  j        b            ~                     buck_vpa            vpa                   5 7        M  P        b                        buck_vproc11            vproc11                   5         M  j        b            ~                           $      buck_vproc12            vproc12                   5         M  j        b            ~                                 buck_vgpu           vgpu                      5         M  j        b                              ,      buck_vs2            vs2                   5 L        M  0        b             ~      buck_vmodem         vmodem                    5         M  j        b           ~                     buck_vs1            vs1          B@        5 '{l        M  0        b             ~      ldo_vdram2          vdram2           	'        5 w@        b           ~      ldo_vsim1           vsim1            )2        5 )2        b        ldo_vibr            vibr             O        5 2Z        b   <      ldo_vrf12             regulator-fixed         vrf12            O        5 O        b   x      ldo_vio18             regulator-fixed         vio18            w@        5 w@        b  
         ~            m      ldo_vusb            vusb             -        5 /M`        b           ~            g      ldo_vcamio            regulator-fixed         vcamio           w@        5 w@        b  E      ldo_vcamd           vcamd                    5 w@        b  E      ldo_vcn18             regulator-fixed         vcn18            w@        5 w@        b        ldo_vfe28             regulator-fixed         vfe28            *        5 *        b        ldo_vsram_proc11            vsram_proc11                      5         M  j        b            ~      ldo_vcn28             regulator-fixed         vcn28            *        5 *        b        ldo_vsram_others            vsram_others                      5         M  j        b            ~      ldo_vsram_gpu         
  vsram_gpu                     5         M  j        b               +      ldo_vxo22             regulator-fixed         vxo22            !        5 !        b   x         ~      ldo_vefuse          vefuse                   5         b        ldo_vaux18            regulator-fixed         vaux18           w@        5 w@        b        ldo_vmch            vmch             ,@         5 2Z        b   <      ldo_vbif28            regulator-fixed         vbif28           *        5 *        b        ldo_vsram_proc12            vsram_proc12                      5         M  j        b            ~      ldo_vcama1          vcama1           w@        5 -        b  E      ldo_vemc            vemc             ,@         5 2Z        b   <            l      ldo_vio28             regulator-fixed         vio28            *        5 *        b        ldo_va12              regulator-fixed         va12             O        5 O        b           ~      ldo_vrf18             regulator-fixed         vrf18            w@        5 w@        b   x      ldo_vcn33_bt          	  vcn33_bt             2Z        5 5g        b        ldo_vcn33_wifi          vcn33_wifi           2Z        5 5g        b        ldo_vcama2          vcama2           w@        5 -        b  E      ldo_vmc         vmc          w@        5 2Z        b   <      ldo_vldo28          vldo28           *        5 -        b        ldo_vaud28            regulator-fixed         vaud28           *        5 *        b              2      ldo_vsim2           vsim2            )2        5 )2        b           mt6358rtc             mediatek,mt6358-rtc       mt6358keys            mediatek,mt6358-keys       power              t               home               f               keyboard@10010000             mediatek,mt6779-keypad          '                                           (         kpd       	  Pdisabled          scp@10500000              mediatek,mt8183-scp          '    P             \             	  sram cfg                                  )            main               3        Pokay            default            4   cros_ec           google,cros-ec-rpmsg            cros-ec-rpmsg            timer@10017000        ,    mediatek,mt8183-timer mediatek,mt6765-timer         '    p                                      5      iommu@10205000            mediatek,mt8183-m4u         '     P                                     6   7   8   9   :   ;   <                       w      mailbox@10238000              mediatek,mt8183-gce         '    #       @                                          )            gce             v      auxadc@11001000       .    mediatek,mt8183-auxadc mediatek,mt8173-auxadc           '                         )   #         main            )           Pokay                R      serial@11002000       *    mediatek,mt8183-uart mediatek,mt6577-uart           '                             [               (   )         	   baud bus            Pokay            default            =      serial@11003000       *    mediatek,mt8183-uart mediatek,mt6577-uart           '     0                       \               (   )         	   baud bus            Pokay            default sleep              >        ;   ?        E          \      *   y      bluetooth           default            @        Pokay              qcom,qca6174-bt         Y   *   x                A        fnvm_00440302_i2s.bin             serial@11004000       *    mediatek,mt8183-uart mediatek,mt6577-uart           '     @                       ]               (   )         	   baud bus          	  Pdisabled          i2c@11005000              mediatek,mt8183-i2c          '     P                                    W               )   W   )   *      	   main dma                                    +            Pokay            default            B        9       i2c@11007000              mediatek,mt8183-i2c          '     p                                    Q               )   
   )   *      	   main dma                                    +            Pokay            default            C        9    touchscreen@10            elan,ekth3500           '           default            D        E   *              t   *               i2c@11008000              mediatek,mt8183-i2c          '                                         R               )      )   *   )   G         main dma arb                                    +            Pokay            default            E        9    anx7625@58            analogix,anx7625            '   X        default            F                   Y   *   -            t   *   I               G           H           I                     +       port@0          '       endpoint               J            y         port@1          '      endpoint               K                           i2c@11009000              mediatek,mt8183-i2c          '                                        S               )      )   *   )   I         main dma arb                                    +            Pokay            default            L        9    trackpad@15           elan,ekth3000           '           default            M        E   *                        spi@1100a000              mediatek,mt8183-spi                      +            '                            x                  6         )            parent-clk sel-clk spi-clk          Pokay            default            N                       *   V      cr50@0            google,cr50         '             B@        default            O            *                       svs@1100b000              mediatek,mt8183-svs         '                                           )   	         main               P   Q      (  svs-calibration-data t-calibration-data       thermal@1100b000                         mediatek,mt8183-thermal         '                         )   	   )   #         therm auxadc            %   )                   L           ,   R        <   S           Q        calibration-data                T      thermal-zones      cpu-thermal         P   d        f          t   T                 trips      trip-point0          	                  "passive       trip-point1          8                  "passive             U      cpu-crit             8                	  "critical             cooling-maps       map0               U      0                               map1               U      0                                     tzts1           P            f            t   T                trips         cooling-maps             tzts2           P            f            t   T                trips         cooling-maps             tzts3           P            f            t   T                trips         cooling-maps             tzts4           P            f            t   T                trips         cooling-maps             tzts5           P            f            t   T                trips         cooling-maps             tztsABB         P            f            t   T                trips         cooling-maps             tboard1         f          P            t   V      tboard2         f          P            t   W         pwm@1100e000              mediatek,mt8183-disp-pwm            '                                          X                                )   5         main mm         Pokay            default            Y            |      pwm@11006000              mediatek,mt8183-pwm         '     `                         0      )      )      )      )      )      )            top main pwm1 pwm2 pwm3 pwm4          i2c@1100f000              mediatek,mt8183-i2c          '                                         T               )      )   *      	   main dma                                    +            Pokay            default            Z        9       spi@11010000              mediatek,mt8183-spi                      +            '                            |                  6         )   8         parent-clk sel-clk spi-clk          Pokay            default            [               flash@0           winbond,w25q64dw jedec,spi-nor          '            }x@         i2c@11011000              mediatek,mt8183-i2c          '                                       U               )   9   )   *      	   main dma                                    +            Pokay            default            \        9       spi@11012000              mediatek,mt8183-spi                      +            '                                              6         )   ;         parent-clk sel-clk spi-clk          Pokay            default            ]               cros-ec@0             google,cros-ec-spi          '             -            *                      default            ^   i2c-tunnel            google,cros-ec-i2c-tunnel                                   +       sbs-battery@b             sbs,sbs-battery         '                                  extcon0           google,extcon-usbc-cros-ec          "          cbas              google,cros-cbas          typec             google,cros-ec-typec                         +       connector@0           usb-c-connector         '            5dual            @host            Jsink             keyboard-controller           google,cros-ec-keyb         Y           i            |     D    ; < = > ? @ A	 B	 C  D  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	  + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i      pwm           google,cros-ec-pwm                   	  Pdisabled                spi@11013000              mediatek,mt8183-spi                      +            '    0                                         6         )   <         parent-clk sel-clk spi-clk        	  Pdisabled            default            _                  i2c@11014000              mediatek,mt8183-i2c          '    @                                                  )   H   )   *   )   G         main dma arb                                    +          	  Pdisabled          i2c@11015000              mediatek,mt8183-i2c          '    P                                                   )   J   )   *   )   I         main dma arb                                    +          	  Pdisabled          i2c@11016000              mediatek,mt8183-i2c          '    `                                    V               )   D   )   *   )   E         main dma arb                                    +            Pokay            default            `        9    ts3a227e@3b         default            a          ti,ts3a227e         '   ;            *                      Pokay                         i2c@11017000              mediatek,mt8183-i2c          '    p                                                  )   F   )   *   )   E         main dma arb                                    +          	  Pdisabled          spi@11018000              mediatek,mt8183-spi                      +            '                                             6         )   K         parent-clk sel-clk spi-clk        	  Pdisabled            default            b                  spi@11019000              mediatek,mt8183-spi                      +            '                                             6         )   L         parent-clk sel-clk spi-clk        	  Pdisabled            default            c                  i2c@1101a000              mediatek,mt8183-i2c          '                                       X               )   b   )   *      	   main dma                                    +          	  Pdisabled          i2c@1101b000              mediatek,mt8183-i2c          '                                        Y               )   c   )   *      	   main dma                                    +          	  Pdisabled          usb@11201000          #    mediatek,mt8183-mtu3 mediatek,mtu3           '            .      >              	  mac ippc                   H              d      e               )   =   )   Z         sys_ck ref_ck              f      e                     +            I        Pokay            host                        g   usb@11200000          '    mediatek,mt8183-xhci mediatek,mtk-xhci          '                      mac                I               )   =   )   Z         sys_ck ref_ck           Pokay                         +               g   hub@1             usb5e3,610          '               audio-controller@11220000              mediatek,mt8183-audiosys syscon         '    "                                i   mt8183-afe-pcm            mediatek,mt8183-audio                             %   h         	  audiosys               X         D      i      i      i      i      i      i      i      i      i      i      i      i   
   i   	   i      i       )   /   )   7                  0            H            L            K            O      t      u      v      w      x      y      z      {      |      }      ~         (     w   aud_afe_clk aud_dac_clk aud_dac_predis_clk aud_adc_clk aud_adc_adda6_clk aud_apll22m_clk aud_apll24m_clk aud_apll1_tuner_clk aud_apll2_tuner_clk aud_i2s1_bclk_sw aud_i2s2_bclk_sw aud_i2s3_bclk_sw aud_i2s4_bclk_sw aud_tdm_clk aud_tml_clk aud_infra_clk mtkaif_26m_clk top_mux_audio top_mux_aud_intbus top_syspll_d2_d4 top_mux_aud_1 top_apll1_ck top_mux_aud_2 top_apll2_ck top_mux_aud_eng1 top_apll1_d8 top_mux_aud_eng2 top_apll2_d8 top_i2s0_m_sel top_i2s1_m_sel top_i2s2_m_sel top_i2s3_m_sel top_i2s4_m_sel top_i2s5_m_sel top_apll12_div0 top_apll12_div1 top_apll12_div2 top_apll12_div3 top_apll12_div4 top_apll12_divb top_clk26m_clk          I2S2            I2S5                ~         mmc@11230000              mediatek,mt8183-mmc          '    #                                     M                     )      )            source hclk source_cg           Pokay            default state_uhs              j        ;   k                                               "         1         B         J        P (        _   l        k   m        x                    U               mmc@11240000              mediatek,mt8183-mmc          '    $                                     N                  	   )      )   (         source hclk source_cg           Pokay            default state_uhs              n        ;   o        _   p        k   q           r                                                                                     	                  	         J        x      	              V                     +       qca-wifi@1            qcom,ath10k         '            dsi-phy@11e50000              mediatek,mt8183-mipi-tx         '                         S                       	            &mipi_tx0_pll               s        calibration-data            Pokay                x      efuse@11f10000        %    mediatek,mt8183-efuse mediatek,efuse            '                                  +      calib@180           '                 Q      calib@190           '                 s      calib@580           '     d            P         t-phy@11f40000        .    mediatek,mt8183-tphy mediatek,generic-tphy-v2                        +           I                     Pokay       usb-phy@0           '                   (         ref         	           	"           Pokay                d      usb-phy@700         '     	             (         ref         	           Pokay                e         syscon@13000000           mediatek,mt8183-mfgcfg syscon           '                                     t      gpu@13040000          &    mediatek,mt8183-mali arm,mali-bifrost           '            @       $                                     	2job mmu gpu             t               X      X      X           	Bcore0 core1 core2               u        	U   ,        	a   +      syscon@14000000           mediatek,mt8183-mmsys syscon            '                                            	m   v          v              	t   v                      -      mdp3-rdma0@14001000           mediatek,mt8183-mdp3-rdma           '                     	t   v                 	                 X               -      -           	   w            	m   v              v                 mdp3-rsz0@14003000            mediatek,mt8183-mdp3-rsz            '     0                	t   v     0            	                  -         mdp3-rsz1@14004000            mediatek,mt8183-mdp3-rsz            '     @                	t   v     @            	                  -         mdp3-wrot0@14005000           mediatek,mt8183-mdp3-wrot           '     P                	t   v     P            	      !           X               -           	   w         mdp3-wdma@14006000            mediatek,mt8183-mdp3-wdma           '     `                	t   v     `            	      "           X               -   )        	   w         ovl@14008000              mediatek,mt8183-disp-ovl            '                                          X               -           	   w            	t   v               ovl@14009000              mediatek,mt8183-disp-ovl-2l         '                                          X               -           	   w           	t   v               ovl@1400a000              mediatek,mt8183-disp-ovl-2l         '                                          X               -           	   w           	t   v               rdma@1400b000             mediatek,mt8183-disp-rdma           '                                          X               -           	   w           	           	t   v               rdma@1400c000             mediatek,mt8183-disp-rdma           '                                          X               -           	   w           	           	t   v               color@1400e000        6    mediatek,mt8183-disp-color mediatek,mt8173-disp-color           '                                          X               -           	t   v               ccorr@1400f000            mediatek,mt8183-disp-ccorr          '                                          X               -           	t   v               aal@14010000              mediatek,mt8183-disp-aal            '                                          X               -           	t   v                gamma@14011000            mediatek,mt8183-disp-gamma          '                                         X               -           	t   v               dither@14012000           mediatek,mt8183-disp-dither         '                                          X               -           	t   v                dsi@14014000              mediatek,mt8183-dsi         '    @                                     X               -      -       x         engine digital hs           %   -              x        	dphy            Pokay                         +       ports      port       endpoint               y            J               mutex@14016000            mediatek,mt8183-disp-mutex          '    `                                     X           	              	t   v     `          larb@14017000             mediatek,mt8183-smi-larb            '    p                   .            -      -              X            apb smi             6      smi@14019000              mediatek,mt8183-smi-common          '                         -       -       -      -            apb smi gals0 gals1            X               .      mdp3-ccorr@1401c000           mediatek,mt8183-mdp3-ccorr          '                    	t   v                 	      1            -   +      syscon@15020000           mediatek,mt8183-imgsys syscon           '                                    0      larb@15021000             mediatek,mt8183-smi-larb            '                       .            0   	   0   	   -            apb smi gals               X   	            ;      larb@1502f000             mediatek,mt8183-smi-larb            '                       .            0      0      -   	         apb smi gals               X   	            8      syscon@16000000           mediatek,mt8183-vdecsys syscon          '                                     z      larb@16010000             mediatek,mt8183-smi-larb            '                        .            z       z            apb smi            X   
            7      syscon@17000000           mediatek,mt8183-vencsys syscon          '                                     {      larb@17010000             mediatek,mt8183-smi-larb            '                        .            {       {             apb smi            X               :      venc_jpg@17030000         +    mediatek,mt8183-jpgenc mediatek,mtk-jpgenc          '                                       	   w      w              X               {            jpgenc        syscon@19000000            mediatek,mt8183-ipu_conn syscon         '                                     1      syscon@19010000           mediatek,mt8183-ipu_adl syscon          '                              syscon@19180000       !    mediatek,mt8183-ipu_core0 syscon            '                              syscon@19280000       !    mediatek,mt8183-ipu_core1 syscon            '    (                          syscon@1a000000           mediatek,mt8183-camsys syscon           '                                     /      larb@1a001000             mediatek,mt8183-smi-larb            '                        .            /       /       -            apb smi gals               X               <      larb@1a002000             mediatek,mt8183-smi-larb            '                         .            /   	   /   	   -            apb smi gals               X               9         chosen          	serial0:115200n8          backlight_lcd0            pwm-backlight           	   |              	   }        Y   *               	              	          
  @        Pokay                      memory@40000000         memory          '    @                oscillator1           fixed-clock                     9           &clk32k              A      regulator0            regulator-fixed         it6505_pp18          w@        5 w@        
)   *                
.      regulator1            regulator-fixed         lcd_pp3300           2Z        5 2Z         ~         
A      regulator2            regulator-fixed       
  bl_pp5000            LK@        5 LK@         ~         
A            }      regulator3            regulator-fixed         mmc1_power           2Z        5 2Z            p      regulator4            regulator-fixed         mmc1_io          w@        5 w@            q      regulator5            regulator-fixed         pp1800_alw           ~         
A         w@        5 w@      regulator6            regulator-fixed         pp3300_alw           ~         
A         2Z        5 2Z      reserved-memory                      +            I   scp_mem_region            shared-dma-pool         '    P                  
S            3         mt8183-sound            
Z   ~      '  default aud_tdm_out_on aud_tdm_out_off                     ;           
l           Pokay            
v         (    mediatek,mt8183_mt6358_ts3a227_max98357       bt-sco            linux,bt-sco          wifi-pwrseq           mmc-pwrseq-simple           default                    t   *   w               r      wifi-wakeup       
    gpio-keys           default               button-wowlan           
Wake on WiFi            `   *   q            
                     thermal-sensor1           generic-adc-thermal                     
   R            
sensor-channel          
x              '  .  :    N   l  a    u0      7  @      {  P  (      `      a p  / $   8    L    _    s       y (   h    Z 8   N    C H   ;            V      thermal-sensor2           generic-adc-thermal                     
   R           
sensor-channel          
x              '  .  :    N   l  a    u0      7  @      {  P  (      `      a p  / $   8    L    _    s       y (   h    Z 8   N    C H   ;            W      panel             auo,b116xw03            	           
      port       endpoint                           K            pp1200-mipibrdg           regulator-fixed         pp1200_mipibrdg         default                     
.         
A        
)   *   6                G      pp1800-mipibrdg           regulator-fixed         pp1800_mipibrdg         default                     
.         
A        
)   *   $                H      pp3300-panel              regulator-fixed         pp3300_panel             2Z        5 2Z        default                     
.         
A        
)   *   #                      vddio-mipibrdg            regulator-fixed         vddio_mipibrdg          default                     
.         
A        
)   *   %                I      volume-buttons        
    gpio-keys           default               button-volume-down          
Volume Down         
   r        
   d        `   *            button-volume-up          
  
Volume Up           
   s        
   d        `   *               max98357a             maxim,max98357a         
   *                	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 i2c9 i2c10 i2c11 ovl0 ovl-2l0 ovl-2l1 rdma0 rdma1 serial0 mmc0 mmc1 opp-shared phandle opp-hz opp-microvolt required-opps clocks clock-names operating-points-v2 proc-supply cpu device_type reg enable-method capacity-dmips-mhz cpu-idle-states dynamic-power-coefficient #cooling-cells mediatek,cci entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us interrupts #clock-cells clock-div clock-mult clock-output-names clock-frequency ranges status #interrupt-cells interrupt-controller mediatek,broken-save-restore-fw affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges gpio-line-names pinmux drive-strength input-enable bias-pull-down output-low bias-pull-up mediatek,pull-up-adv mediatek,drive-strength-adv bias-disable mediatek,pull-down-adv output-high output-enable #power-domain-cells mediatek,infracfg domain-supply mediatek,smi mediatek,dmic-mode Avdd-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-always-on regulator-allowed-modes linux,keycodes wakeup-source memory-region pinctrl-names pinctrl-0 mediatek,rpmsg-name mediatek,larbs #iommu-cells #mbox-cells #io-channel-cells pinctrl-1 interrupts-extended enable-gpios firmware-name reset-gpios panel_flags vdd10-supply vdd18-supply vdd33-supply remote-endpoint mediatek,pad-select cs-gpios spi-max-frequency nvmem-cells nvmem-cell-names #thermal-sensor-cells resets mediatek,auxadc mediatek,apmixedsys polling-delay-passive polling-delay thermal-sensors sustainable-power temperature hysteresis trip cooling-device contribution power-domains #pwm-cells google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count google,usb-port-id power-role data-role try-power-role keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap phys mediatek,syscon-wakeup dr_mode vusb33-supply reset-names i2s3-share i2s0-share bus-width cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v cap-mmc-hw-reset no-sdio no-sd hs400-ds-delay vmmc-supply vqmmc-supply assigned-clocks assigned-clock-parents non-removable mmc-pwrseq drv-type cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 keep-power-in-suspend cap-sdio-irq no-mmc #phy-cells mediatek,discth interrupt-names power-domain-names mali-supply sram-supply mboxes mediatek,gce-client-reg mediatek,gce-events iommus mediatek,rdma-fifo-size phy-names stdout-path pwms power-supply brightness-levels num-interpolated-steps default-brightness-level gpio enable-active-high regulator-boot-on no-map mediatek,platform pinctrl-2 mediatek,headset-codec label linux,code io-channels io-channel-names temperature-lookup-table backlight debounce-interval sdmode-gpios 