  Qs   8  L0   (            C  K                                                                      ,Spreadtrum SP9860G 3GFHD Board           2sprd,sp9860g-1h10 sprd,sc9860      soc          2simple-bus                                     =   syscon@20210000          2syscon           D     !                  H         syscon@402b0000          2syscon           D    @+                  H         syscon@402e0000          2syscon           D    @.                  H         syscon@40400000          2syscon           D    @@                  H         syscon@415e0000          2syscon           D    A^                  H         syscon@61100000          2syscon           D    a                  H         syscon@62100000          2syscon           D    b                  H         syscon@63100000          2syscon           D    c                  H         syscon@70b00000          2syscon           D    p                  H   !      ap-apb           2simple-bus                                    =        p         serial@0          "   2sprd,sc9860-uart sprd,sc9836-uart            D                P                   [enable uart source           g                        nokay          serial@100000         "   2sprd,sc9860-uart sprd,sc9836-uart            D               P                   [enable uart source           g                        nokay          serial@200000         "   2sprd,sc9860-uart sprd,sc9836-uart            D                P                   [enable uart source           g                        nokay          serial@300000         "   2sprd,sc9860-uart sprd,sc9836-uart            D 0              P                   [enable uart source           g                        nokay             ap-ahb           2simple-bus                                     =   dma-controller@20100000          2sprd,sc9860-dma          D             @          P       *            u                                      [enable           g            sdio@50430000            2sprd,sdhci-r11           D    PC                  P       )            [sdio enable 2x_enable            g                  C                                       D      .   .                                  ?   u                  ?   ?   .   .           	        '            1         ?         G         M         ^         x                           aon          2simple-bus                                     =   spi@40030000             2sprd,sc9860-adi          D    @                    
            adi                              pmic@0           2sprd,sc2731          D                     P                                                                 H      charger@0            2sprd,sc2731-charger          D                     led-controller@200           2sprd,sc2731-bltc             D                                led@0           red          D          led@1           green            D         led@2           blue             D            rtc@280          2sprd,sc2731-rtc          D                        P         gpio@300             2sprd,sc2731-eic          D                         P                                                    H         efuse@380            2sprd,sc2731-efuse            D                                      
      calib@6          D              $       	         H         calib@24             D   $            H         calib@26             D   &            H            adc@480          2sprd,sc2731-adc          D                        P            )              
         "  ;big_scale_calib small_scale_calib           L               H         fgu@a00          2sprd,sc2731-fgu          D  
         X      	            h                    tbat-temp charge-vol                  
  ;fgu_calib           L                         P         vibrator@ec8             2sprd,sc2731-vibrator             D        regulators           2sprd,sc2731-regulator      BUCK_CPU0           vddarm0                   xK          a               BUCK_CPU1           vddarm1                   xK          a               BUCK_RF         dcdcrf           	'         !          a           d               LDO_CAMA0         	  vddcama0             O         98p           d      LDO_CAMA1         	  vddcama1             O         98p           d          a      LDO_CAMMOT        
  vddcammot            O         98p           d          a      LDO_VLDO            vddvldo          O         98p           d          a      LDO_EMMCCORE            vddemmccore          O         98p           d          a         	         H   	      LDO_SDCORE        
  vddsdcore            O         98p           d          a      LDO_SDIO            vddsdio          O         98p           d          a      LDO_WIFIPA        
  vddwifipa            O         98p           d          a      LDO_USB33         	  vddusb33             O         98p           d          a      LDO_CAMD0         	  vddcamd0             B@         ^           d          a      LDO_CAMD1         	  vddcamd1             B@         ^           d          a      LDO_CON         vddcon           B@         ^           d          a      LDO_CAMIO         	  vddcamio             B@         ^           d          a      LDO_SRAM            vddsram          B@         ^           d          a                        timer@40050000           2sprd,sc9860-timer            D    @                   P                   g         timer@40050020           2sprd,sc9860-suspend-timer            D    @                   g         hwspinlock@40500000          2sprd,hwspinlock-r3p0             D    @P                             [enable           g               H   
      gpio@40210000            2sprd,sc9860-eic-debounce             D    @!                                                          P       4            H   H      gpio@40210080            2sprd,sc9860-eic-latch            D    @!                                                          P       4         gpio@402100a0            2sprd,sc9860-eic-async            D    @!                                                          P       4         gpio@402100c0            2sprd,sc9860-eic-sync             D    @!                                                          P       4         gpio@40280000            2sprd,sc9860-gpio             D    @(                                                          P       2         pinctrl@402a0000             2sprd,sc9860-pinctrl          D    @*               watchdog@40310000            2sprd,sp9860-wdt          D    @1                  P       =           )            [enable rtc_enable            g      (      L         agcp             2simple-bus                                     =   dma-controller@41580000          2sprd,sc9860-dma          D    AX        @          u                                      [enable ashb_eb           g                     pmu-gate             2sprd,sc9860-pmu-gate            5            g           A            H         pll          2sprd,sc9860-pll         5            g               A            H         clock-controller@20000000            2sprd,sc9860-ap-clk           D                        g                         A            H         aon-prediv           2sprd,sc9860-aon-prediv           D    @-                  g                         A            H         apahb-gate           2sprd,sc9860-apahb-gate          5            g               A            H         aon-gate             2sprd,sc9860-aon-gate            5            g               A            H         clock-controller@40880000            2sprd,sc9860-aonsecure-clk            D    @                  g                  A         agcp-gate            2sprd,sc9860-agcp-gate           5            g               A            H         clock-controller@60200000            2sprd,sc9860-gpu-clk          D    `                   g               A         clock-controller@61000000            2sprd,sc9860-vsp-clk          D    a                   g                  A            H         vsp-gate             2sprd,sc9860-vsp-gate            5            g               A         clock-controller@62000000            2sprd,sc9860-cam-clk          D    b         @          g                  A            H         cam-gate             2sprd,sc9860-cam-gate            5            g               A         clock-controller@63000000            2sprd,sc9860-disp-clk             D    c                   g                  A            H          disp-gate            2sprd,sc9860-disp-gate           5            g                A         apapb-gate           2sprd,sc9860-apapb-gate          5   !         g               A            H         funnel@10001000       +   2arm,coresight-dynamic-funnel arm,primecell           D                      g         	   [apb_pclk       out-ports      port       endpoint            N   "         H   %            in-ports                                 port@0           D       endpoint            N   #         H   5         port@4           D      endpoint            N   $         H   &               etb@10003000              2arm,coresight-tmc arm,primecell          D     0                 g         	   [apb_pclk       out-ports      port       endpoint            N   %         H   "               stm@10006000              2arm,coresight-stm arm,primecell           D     `                              ^stm-base stm-stimulus-base           g         	   [apb_pclk       out-ports      port       endpoint            N   &         H   $               funnel@11001000       +   2arm,coresight-dynamic-funnel arm,primecell           D                      g         	   [apb_pclk       out-ports      port       endpoint            N   '         H   2            in-ports                                 port@0           D       endpoint            N   (         H   9         port@1           D      endpoint            N   )         H   ;         port@2           D      endpoint            N   *         H   =         port@4           D      endpoint            N   +         H   ?               funnel@11002000       +   2arm,coresight-dynamic-funnel arm,primecell           D                       g         	   [apb_pclk       out-ports      port       endpoint            N   ,         H   4            in-ports                                 port@0           D       endpoint            N   -         H   A         port@1           D      endpoint            N   .         H   C         port@2           D      endpoint            N   /         H   E         port@3           D      endpoint            N   0         H   G               etf@11003000              2arm,coresight-tmc arm,primecell          D     0                 g         	   [apb_pclk       out-ports      port       endpoint            N   1         H   6            in-ports       port       endpoint            N   2         H   '               etf@11004000              2arm,coresight-tmc arm,primecell          D     @                 g         	   [apb_pclk       out-ports      port       endpoint            N   3         H   7            in-ports       port       endpoint            N   4         H   ,               funnel@11005000       +   2arm,coresight-dynamic-funnel arm,primecell           D     P                 g         	   [apb_pclk       out-ports      port       endpoint            N   5         H   #            in-ports                                 port@0           D       endpoint            N   6         H   1         port@1           D      endpoint            N   7         H   3               etm@11440000          "   2arm,coresight-etm4x arm,primecell            D    D                 h   8         g         	   [apb_pclk       out-ports      port       endpoint            N   9         H   (               etm@11540000          "   2arm,coresight-etm4x arm,primecell            D    T                 h   :         g         	   [apb_pclk       out-ports      port       endpoint            N   ;         H   )               etm@11640000          "   2arm,coresight-etm4x arm,primecell            D    d                 h   <         g         	   [apb_pclk       out-ports      port       endpoint            N   =         H   *               etm@11740000          "   2arm,coresight-etm4x arm,primecell            D    t                 h   >         g         	   [apb_pclk       out-ports      port       endpoint            N   ?         H   +               etm@11840000          "   2arm,coresight-etm4x arm,primecell            D                     h   @         g         	   [apb_pclk       out-ports      port       endpoint            N   A         H   -               etm@11940000          "   2arm,coresight-etm4x arm,primecell            D                     h   B         g         	   [apb_pclk       out-ports      port       endpoint            N   C         H   .               etm@11a40000          "   2arm,coresight-etm4x arm,primecell            D                     h   D         g         	   [apb_pclk       out-ports      port       endpoint            N   E         H   /               etm@11b40000          "   2arm,coresight-etm4x arm,primecell            D                     h   F         g         	   [apb_pclk       out-ports      port       endpoint            N   G         H   0               gpio-keys         
   2gpio-keys      key-volumedown          Volume Down Key         l   r        w   H              }                  key-volumeup            Volume Up Key           l   s        w      
            }                  key-power         
  Power Key           l   t        w                  }                        ext_32k          2fixed-clock         A                       ext-32k          H         ext_26m          2fixed-clock         A                    ext-26m          H         ext_rco_100m             2fixed-clock         A                     ext-rco-100m          clk_l0_409m6             2fixed-clock         A            j        
  ext-409m6            H         cpus                                 cpu-map    cluster0       core0           h   8      core1           h   :      core2           h   <      core3           h   >         cluster1       core0           h   @      core1           h   B      core2           h   D      core3           h   F            cpu@530000          cpu          2arm,cortex-a53           D     S          psci               I   J         H   8      cpu@530001          cpu          2arm,cortex-a53           D     S         psci               I   J         H   :      cpu@530002          cpu          2arm,cortex-a53           D     S         psci               I   J         H   <      cpu@530003          cpu          2arm,cortex-a53           D     S         psci               I   J         H   >      cpu@530100          cpu          2arm,cortex-a53           D     S         psci               I   J         H   @      cpu@530101          cpu          2arm,cortex-a53           D     S        psci               I   J         H   B      cpu@530102          cpu          2arm,cortex-a53           D     S        psci               I   J         H   D      cpu@530103          cpu          2arm,cortex-a53           D     S        psci               I   J         H   F         idle-states         psci       core_pd          2arm,idle-state                                	         )        :           H   I      cluster_pd           2arm,idle-state                                         )        :          H   J         interrupt-controller@12001000            2arm,gic-400       @   D                                 @              `                                      P      	           H         psci             2arm,psci-0.2            smc       timer            2arm,armv8-timer       0   P                              
        pmu       #   2arm,cortex-a53-pmu arm,armv8-pmuv3        `   P       z          {          |          }                                                    Q   8   :   <   >   @   B   D   F      aliases         d/soc/ap-apb/serial@0            l/soc/ap-apb/serial@100000           t/soc/ap-apb/serial@200000           |/soc/ap-apb/serial@300000           /soc/aon/spi@40030000         memory          memory            D           `             `         chosen          serial1:115200n8          reserved-memory                                    =      battery          2simple-battery                             B`0         А                   . ?ۨ   d >h   _ >
   Z =^   U <Ƙ   P <A   K ;   F ;Wh   A :   < :x   7 :H   2 9   - 9   ( 9H   # 9    9s    9@@    8    8'    
 7    3@             H            	interrupt-parent #address-cells #size-cells model compatible ranges reg phandle interrupts clock-names clocks status #dma-cells #dma-channels assigned-clocks assigned-clock-parents sprd,phy-delay-mmc-hs400 sprd,phy-delay-mmc-hs200 sprd,phy-delay-mmc-ddr52 sprd,phy-delay-mmc-hs400es vmmc-supply bus-width non-removable no-sdio no-sd cap-mmc-hw-reset mmc-hs400-enhanced-strobe mmc-hs400-1_8v mmc-hs200-1_8v mmc-ddr-1_8v hwlocks hwlock-names spi-max-frequency interrupt-controller #interrupt-cells monitored-battery label gpio-controller #gpio-cells bits #io-channel-cells nvmem-cell-names nvmem-cells bat-detect-gpio io-channels io-channel-names regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-enable-ramp-delay regulator-boot-on #hwlock-cells timeout-sec sprd,syscon #clock-cells remote-endpoint reg-names cpu linux,code gpios debounce-interval wakeup-source clock-frequency clock-output-names device_type enable-method cpu-idle-states entry-method entry-latency-us exit-latency-us min-residency-us local-timer-stop arm,psci-suspend-param interrupt-affinity serial0 serial1 serial2 serial3 spi0 stdout-path charge-full-design-microamp-hours charge-term-current-microamp constant_charge_voltage_max_microvolt internal-resistance-micro-ohms ocv-capacity-celsius ocv-capacity-table-0 