Ðþí  w   8  <   (            ;                               $    mediatek,mt6779-evb mediatek,mt6779                                  +            7MediaTek MT6779 EVB    psci              arm,psci-0.2             =smc       cpus                         +       cpu@0            Dcpu           arm,cortex-a55           Ppsci             ^             b         cpu@1            Dcpu           arm,cortex-a55           Ppsci             ^            b         cpu@2            Dcpu           arm,cortex-a55           Ppsci             ^            b         cpu@3            Dcpu           arm,cortex-a55           Ppsci             ^            b         cpu@4            Dcpu           arm,cortex-a55           Ppsci             ^            b         cpu@5            Dcpu           arm,cortex-a55           Ppsci             ^            b         cpu@6            Dcpu           arm,cortex-a75           Ppsci             ^            b   	      cpu@7            Dcpu           arm,cortex-a75           Ppsci             ^            b   
         pmu           arm,armv8-pmuv3                      j                   oscillator-26m            fixed-clock          u             ‚Œº€         ’clk26m           b         oscillator-32k            fixed-clock          u             ‚  €          ’clk32k        timer             arm,armv8-timer                   @   j                                             
             soc                      +             simple-bus            ¥   interrupt-controller@c000000              arm,gic-v3           ¬                         ½          ^                                     j      	                b      ppi-partitions     interrupt-partition-0            Ò                        interrupt-partition-1            Ò   	   
            intpol-controller@c53a650         .    mediatek,mt6779-sysirq mediatek,mt6577-sysirq             ½         ¬                        ^    S¦P       P         b         clock-controller@10000000              mediatek,mt6779-topckgen syscon          ^                       u         clock-controller@10001000         #    mediatek,mt6779-infracfg_ao syscon           ^                      u            b         pinctrl@10005000              mediatek,mt6779-pinctrl syscon           ^     P            Â             Ñ             â             ç             ê             ò             ó              °              I   Ûgpio iocfg_rm iocfg_br iocfg_lm iocfg_lb iocfg_rt iocfg_lt iocfg_tl eint              å         õ                         Ò          ½         ¬            j       Ì            b         clock-controller@1000c000             mediatek,mt6779-apmixed syscon           ^     À                 u         pwrap@1000d000            mediatek,mt6779-pwrap            ^     Ð                 Ûpwrap            j       Ô                          	  spi wrap          devapc@10207000           mediatek,mt6779-devapc           ^     p                 j       ¨                 -        devapc-infra-clock        serial@11002000       *    mediatek,mt6779-uart mediatek,mt6577-uart            ^                       j       s                          	  baud bus             okay          serial@11003000       *    mediatek,mt6779-uart mediatek,mt6577-uart            ^     0                 j       t                          	  baud bus          	   disabled          serial@11004000       *    mediatek,mt6779-uart mediatek,mt6577-uart            ^     @                 j       u                          	  baud bus          	   disabled          clock-controller@11210000             mediatek,mt6779-audio syscon             ^    !                  u         clock-controller@13fbf000             mediatek,mt6779-mfgcfg syscon            ^    ûð                 u         syscon@14000000           mediatek,mt6779-mmsys syscon             ^                       u         clock-controller@15020000             mediatek,mt6779-imgsys syscon            ^                      u         clock-controller@16000000             mediatek,mt6779-vdecsys syscon           ^                       u         clock-controller@17000000             mediatek,mt6779-vencsys syscon           ^                       u         clock-controller@1a000000             mediatek,mt6779-camsys syscon            ^                       u         clock-controller@1b000000             mediatek,mt6779-ipesys syscon            ^                       u            aliases         '/soc/serial@11002000          memory@40000000          Dmemory           ^    @       €        chosen          /serial0:921600n8             	compatible interrupt-parent #address-cells #size-cells model method device_type enable-method reg phandle interrupts #clock-cells clock-frequency clock-output-names ranges #interrupt-cells interrupt-controller affinity reg-names gpio-controller #gpio-cells gpio-ranges clocks clock-names status serial0 stdout-path 